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Antonio Nino Diazae6779e2017-11-06 14:49:04 +00001/*
Antonio Nino Diaz1f470022018-03-27 09:39:47 +01002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diazae6779e2017-11-06 14:49:04 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <assert_macros.S>
10#include <platform_def.h>
11
Andre Przywarabb6ef152019-07-09 11:44:14 +010012#include "../include/rpi_hw.h"
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000013
14 .globl plat_crash_console_flush
15 .globl plat_crash_console_init
16 .globl plat_crash_console_putc
17 .globl platform_mem_init
18 .globl plat_get_my_entrypoint
19 .globl plat_is_my_cpu_primary
20 .globl plat_my_core_pos
21 .globl plat_reset_handler
22 .globl plat_rpi3_calc_core_pos
23 .globl plat_secondary_cold_boot_setup
24
25 /* -----------------------------------------------------
26 * unsigned int plat_my_core_pos(void)
27 *
28 * This function uses the plat_rpi3_calc_core_pos()
29 * definition to get the index of the calling CPU.
30 * -----------------------------------------------------
31 */
32func plat_my_core_pos
33 mrs x0, mpidr_el1
34 b plat_rpi3_calc_core_pos
35endfunc plat_my_core_pos
36
37 /* -----------------------------------------------------
38 * unsigned int plat_rpi3_calc_core_pos(u_register_t mpidr);
39 *
40 * CorePos = (ClusterId * 4) + CoreId
41 * -----------------------------------------------------
42 */
43func plat_rpi3_calc_core_pos
44 and x1, x0, #MPIDR_CPU_MASK
45 and x0, x0, #MPIDR_CLUSTER_MASK
46 add x0, x1, x0, LSR #6
47 ret
48endfunc plat_rpi3_calc_core_pos
49
50 /* -----------------------------------------------------
51 * unsigned int plat_is_my_cpu_primary (void);
52 *
53 * Find out whether the current cpu is the primary
54 * cpu.
55 * -----------------------------------------------------
56 */
57func plat_is_my_cpu_primary
58 mrs x0, mpidr_el1
59 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
60 cmp x0, #RPI3_PRIMARY_CPU
61 cset w0, eq
62 ret
63endfunc plat_is_my_cpu_primary
64
65 /* -----------------------------------------------------
66 * void plat_secondary_cold_boot_setup (void);
67 *
68 * This function performs any platform specific actions
69 * needed for a secondary cpu after a cold reset e.g
70 * mark the cpu's presence, mechanism to place it in a
71 * holding pen etc.
72 * -----------------------------------------------------
73 */
74func plat_secondary_cold_boot_setup
75 /* Calculate address of our hold entry */
76 bl plat_my_core_pos
77 lsl x0, x0, #3
78 mov_imm x2, PLAT_RPI3_TM_HOLD_BASE
79 add x0, x0, x2
80
81 /*
82 * This code runs way before requesting the warmboot of this core,
83 * so it is possible to clear the mailbox before getting a request
84 * to boot.
85 */
86 mov x1, PLAT_RPI3_TM_HOLD_STATE_WAIT
87 str x1,[x0]
88
89 /* Wait until we have a go */
90poll_mailbox:
91 wfe
92 ldr x1, [x0]
93 cmp x1, PLAT_RPI3_TM_HOLD_STATE_GO
94 bne poll_mailbox
95
96 /* Jump to the provided entrypoint */
97 mov_imm x0, PLAT_RPI3_TM_ENTRYPOINT
98 ldr x1, [x0]
99 br x1
100endfunc plat_secondary_cold_boot_setup
101
102 /* ---------------------------------------------------------------------
103 * uintptr_t plat_get_my_entrypoint (void);
104 *
105 * Main job of this routine is to distinguish between a cold and a warm
106 * boot.
107 *
108 * This functions returns:
109 * - 0 for a cold boot.
110 * - Any other value for a warm boot.
111 * ---------------------------------------------------------------------
112 */
113func plat_get_my_entrypoint
114 /* TODO: support warm boot */
115 mov x0, #0
116 ret
117endfunc plat_get_my_entrypoint
118
119 /* ---------------------------------------------
120 * void platform_mem_init (void);
121 *
122 * No need to carry out any memory initialization.
123 * ---------------------------------------------
124 */
125func platform_mem_init
126 ret
127endfunc platform_mem_init
128
129 /* ---------------------------------------------
130 * int plat_crash_console_init(void)
131 * Function to initialize the crash console
132 * without a C Runtime to print crash report.
133 * Clobber list : x0 - x3
134 * ---------------------------------------------
135 */
136func plat_crash_console_init
137 mov_imm x0, PLAT_RPI3_UART_BASE
138 mov_imm x1, PLAT_RPI3_UART_CLK_IN_HZ
139 mov_imm x2, PLAT_RPI3_UART_BAUDRATE
Antonio Nino Diaz1f470022018-03-27 09:39:47 +0100140 b console_16550_core_init
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000141endfunc plat_crash_console_init
142
143 /* ---------------------------------------------
144 * int plat_crash_console_putc(int c)
145 * Function to print a character on the crash
146 * console without a C Runtime.
147 * Clobber list : x1, x2
148 * ---------------------------------------------
149 */
150func plat_crash_console_putc
151 mov_imm x1, PLAT_RPI3_UART_BASE
Antonio Nino Diaz1f470022018-03-27 09:39:47 +0100152 b console_16550_core_putc
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000153endfunc plat_crash_console_putc
154
155 /* ---------------------------------------------
156 * int plat_crash_console_flush()
157 * Function to force a write of all buffered
158 * data that hasn't been output.
159 * Out : return -1 on error else return 0.
160 * Clobber list : x0, x1
161 * ---------------------------------------------
162 */
163func plat_crash_console_flush
Antonio Nino Diaz1f470022018-03-27 09:39:47 +0100164 mov_imm x0, PLAT_RPI3_UART_BASE
165 b console_16550_core_flush
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000166endfunc plat_crash_console_flush
167
168 /* ---------------------------------------------
169 * void plat_reset_handler(void);
170 * ---------------------------------------------
171 */
172func plat_reset_handler
173 /* use the 19.2 MHz clock for the architected timer */
174 mov x0, #RPI3_INTC_BASE_ADDRESS
175 mov w1, #0x80000000
176 str wzr, [x0, #RPI3_INTC_CONTROL_OFFSET]
177 str w1, [x0, #RPI3_INTC_PRESCALER_OFFSET]
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000178 ret
179endfunc plat_reset_handler