blob: 76f04cd0a3db7233f002edf517483403037dba8d [file] [log] [blame]
Achin Gupta1fa7eb62015-11-03 14:18:34 +00001/*
2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <gicv2.h>
32#include <plat_arm.h>
33#include <platform.h>
34#include <platform_def.h>
35
36/******************************************************************************
37 * The following functions are defined as weak to allow a platform to override
38 * the way the GICv2 driver is initialised and used.
39 *****************************************************************************/
40#pragma weak plat_arm_gic_driver_init
41#pragma weak plat_arm_gic_init
42#pragma weak plat_arm_gic_cpuif_enable
43#pragma weak plat_arm_gic_cpuif_disable
44#pragma weak plat_arm_gic_pcpu_init
45
46/******************************************************************************
47 * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
48 * interrupts.
49 *****************************************************************************/
50const unsigned int g0_interrupt_array[] = {
51 PLAT_ARM_G1S_IRQS,
52 PLAT_ARM_G0_IRQS
53};
54
55/*
56 * Ideally `arm_gic_data` structure definition should be a `const` but it is
57 * kept as modifiable for overwriting with different GICD and GICC base when
58 * running on FVP with VE memory map.
59 */
60gicv2_driver_data_t arm_gic_data = {
61 .gicd_base = PLAT_ARM_GICD_BASE,
62 .gicc_base = PLAT_ARM_GICC_BASE,
63 .g0_interrupt_num = ARRAY_SIZE(g0_interrupt_array),
64 .g0_interrupt_array = g0_interrupt_array,
65};
66
67/******************************************************************************
68 * ARM common helper to initialize the GICv2 only driver.
69 *****************************************************************************/
70void plat_arm_gic_driver_init(void)
71{
72 gicv2_driver_init(&arm_gic_data);
73}
74
75void plat_arm_gic_init(void)
76{
77 gicv2_distif_init();
78 gicv2_pcpu_distif_init();
79 gicv2_cpuif_enable();
80}
81
82/******************************************************************************
83 * ARM common helper to enable the GICv2 CPU interface
84 *****************************************************************************/
85void plat_arm_gic_cpuif_enable(void)
86{
87 gicv2_cpuif_enable();
88}
89
90/******************************************************************************
91 * ARM common helper to disable the GICv2 CPU interface
92 *****************************************************************************/
93void plat_arm_gic_cpuif_disable(void)
94{
95 gicv2_cpuif_disable();
96}
97
98/******************************************************************************
99 * ARM common helper to initialize the per cpu distributor interface in GICv2
100 *****************************************************************************/
101void plat_arm_gic_pcpu_init(void)
102{
103 gicv2_pcpu_distif_init();
104}