blob: 4ca55b18bfa34e89b9316840fbc41e093a9dbe54 [file] [log] [blame]
Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <assert.h>
32#include <platform.h>
33#include <cci400.h>
34
35static inline unsigned long get_slave_iface_base(unsigned long mpidr)
36{
37 return CCI400_BASE + SLAVE_IFACE_OFFSET(CCI400_SL_IFACE_INDEX(mpidr));
38}
39
40void cci_enable_coherency(unsigned long mpidr)
41{
42 /* Enable Snoops and DVM messages */
43 mmio_write_32(get_slave_iface_base(mpidr) + SNOOP_CTRL_REG,
44 DVM_EN_BIT | SNOOP_EN_BIT);
45
46 /* Wait for the dust to settle down */
Dan Handleya70615f2014-04-09 12:48:25 +010047 while (mmio_read_32(CCI400_BASE + STATUS_REG) & CHANGE_PENDING_BIT)
48 ;
Achin Gupta4f6ad662013-10-25 09:08:21 +010049}
50
51void cci_disable_coherency(unsigned long mpidr)
52{
53 /* Disable Snoops and DVM messages */
54 mmio_write_32(get_slave_iface_base(mpidr) + SNOOP_CTRL_REG,
55 ~(DVM_EN_BIT | SNOOP_EN_BIT));
56
57 /* Wait for the dust to settle down */
Dan Handleya70615f2014-04-09 12:48:25 +010058 while (mmio_read_32(CCI400_BASE + STATUS_REG) & CHANGE_PENDING_BIT)
59 ;
Achin Gupta4f6ad662013-10-25 09:08:21 +010060}
61