blob: 79c4c07f634d992c22713f561faeee3a83431b28 [file] [log] [blame]
Achin Guptada6ef0e2019-10-11 14:54:48 +01001/*
2 * Copyright (c) 2020, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6/dts-v1/;
7
8/ {
Olivier Deprez92e4c642020-02-28 12:12:08 +01009 compatible = "arm,spci-core-manifest-1.0";
Achin Guptada6ef0e2019-10-11 14:54:48 +010010
11 attribute {
Max Shvetsove79062e2020-03-12 15:16:40 +000012 spmc_id = <0x8000>;
Achin Guptada6ef0e2019-10-11 14:54:48 +010013 maj_ver = <0x0>;
14 min_ver = <0x9>;
Achin Guptada6ef0e2019-10-11 14:54:48 +010015 exec_state = <0x0>;
16 load_address = <0x0 0x6000000>;
17 entrypoint = <0x0 0x6000000>;
18 };
Olivier Deprez92e4c642020-02-28 12:12:08 +010019
20 chosen {
21 linux,initrd-start = <0>;
22 linux,initrd-end = <0>;
23 };
24
25 hypervisor {
26 compatible = "hafnium,hafnium";
27 vm1 {
28 is_spci_partition;
29 debug_name = "cactus-primary";
30 load-addr = <0x7000000>;
31 };
32 vm2 {
33 is_spci_partition;
34 debug_name = "cactus-secondary";
35 load-addr = <0x7100000>;
36 vcpu_count = <2>;
37 mem_size = <1048576>;
38 };
39 };
40
41 cpus {
42 #address-cells = <0x2>;
43 #size-cells = <0x0>;
44
45 cpu-map {
46 cluster0 {
47 core0 {
48 cpu = <0x2>;
49 };
50 };
51 };
52
53 cpu@0 {
54 device_type = "cpu";
55 compatible = "arm,armv8";
56 reg = <0x0 0x0>;
57 enable-method = "psci";
58 next-level-cache = <0xc>;
59 phandle = <0x2>;
60 };
61 };
62
63 memory@60000000 {
64 device_type = "memory";
65 reg = <0x6000000 0x2000000>; /* Trusted DRAM */
66 };
Achin Guptada6ef0e2019-10-11 14:54:48 +010067};