dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 1 | /* |
Roberto Vargas | 2b36b15 | 2018-02-12 12:36:17 +0000 | [diff] [blame] | 2 | * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <assert.h> |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 8 | #include <stdbool.h> |
| 9 | #include <stdint.h> |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 10 | #include <string.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 11 | |
| 12 | #include <lib/mmio.h> |
| 13 | #include <lib/utils_def.h> |
Antonio Nino Diaz | a320ecd | 2019-01-15 14:19:50 +0000 | [diff] [blame] | 14 | #include <platform_def.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 15 | |
Roberto Vargas | 2b36b15 | 2018-02-12 12:36:17 +0000 | [diff] [blame] | 16 | #include "juno_decl.h" |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 17 | |
| 18 | #define NSAMPLE_CLOCKS 1 /* min 1 cycle, max 231 cycles */ |
| 19 | #define NRETRIES 5 |
| 20 | |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 21 | /* initialised to false */ |
| 22 | static bool juno_trng_initialized; |
| 23 | |
| 24 | static bool output_valid(void) |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 25 | { |
| 26 | int i; |
| 27 | |
| 28 | for (i = 0; i < NRETRIES; i++) { |
| 29 | uint32_t val; |
| 30 | |
| 31 | val = mmio_read_32(TRNG_BASE + TRNG_STATUS); |
| 32 | if (val & 1U) |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 33 | return true; |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 34 | } |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 35 | return false; /* No output data available. */ |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 36 | } |
| 37 | |
| 38 | /* |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 39 | * This function fills `buf` with 8 bytes of entropy. |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 40 | * It uses the Trusted Entropy Source peripheral on Juno. |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 41 | * Returns 'true' when the buffer has been filled with entropy |
| 42 | * successfully, or 'false' otherwise. |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 43 | */ |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 44 | bool juno_getentropy(uint64_t *buf) |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 45 | { |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 46 | uint64_t ret; |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 47 | |
| 48 | assert(buf); |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 49 | assert(!check_uptr_overflow((uintptr_t)buf, sizeof(*buf))); |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 50 | |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 51 | if (!juno_trng_initialized) { |
| 52 | /* Disable interrupt mode. */ |
| 53 | mmio_write_32(TRNG_BASE + TRNG_INTMASK, 0); |
| 54 | /* Program TRNG to sample for `NSAMPLE_CLOCKS`. */ |
| 55 | mmio_write_32(TRNG_BASE + TRNG_CONFIG, NSAMPLE_CLOCKS); |
| 56 | /* Abort any potentially pending sampling. */ |
| 57 | mmio_write_32(TRNG_BASE + TRNG_CONTROL, 2); |
| 58 | /* Reset TRNG outputs. */ |
| 59 | mmio_write_32(TRNG_BASE + TRNG_STATUS, 1); |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 60 | |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 61 | juno_trng_initialized = true; |
| 62 | } |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 63 | |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 64 | if (!output_valid()) { |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 65 | /* Start TRNG. */ |
| 66 | mmio_write_32(TRNG_BASE + TRNG_CONTROL, 1); |
| 67 | |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 68 | if (!output_valid()) |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 69 | return false; |
| 70 | } |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 71 | |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 72 | /* XOR each two 32-bit registers together, combine the pairs */ |
| 73 | ret = mmio_read_32(TRNG_BASE + 0); |
| 74 | ret ^= mmio_read_32(TRNG_BASE + 4); |
| 75 | ret <<= 32; |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 76 | |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 77 | ret |= mmio_read_32(TRNG_BASE + 8); |
| 78 | ret ^= mmio_read_32(TRNG_BASE + 12); |
| 79 | *buf = ret; |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 80 | |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 81 | /* Acknowledge current cycle, clear output registers. */ |
| 82 | mmio_write_32(TRNG_BASE + TRNG_STATUS, 1); |
| 83 | /* Trigger next TRNG cycle. */ |
| 84 | mmio_write_32(TRNG_BASE + TRNG_CONTROL, 1); |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 85 | |
Andre Przywara | 927b399 | 2020-10-08 00:43:50 +0100 | [diff] [blame^] | 86 | return true; |
dp-arm | 8f59e15 | 2017-02-27 12:21:43 +0000 | [diff] [blame] | 87 | } |