| Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef __PLAT_MACROS_S__ |
| 8 | #define __PLAT_MACROS_S__ |
| 9 | |
| 10 | #include <cci.h> |
| Antonio Nino Diaz | 42c7bbd | 2018-09-24 17:15:05 +0100 | [diff] [blame] | 11 | #include <gicv2.h> |
| Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 12 | #include <hi6220.h> |
| 13 | #include <platform_def.h> |
| 14 | |
| 15 | .section .rodata.gic_reg_name, "aS" |
| 16 | gicc_regs: |
| 17 | .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", "" |
| 18 | gicd_pend_reg: |
| Haojian Zhuang | 2b9f815 | 2018-09-10 11:28:25 +0800 | [diff] [blame] | 19 | .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n" |
| Haojian Zhuang | 5f281b3 | 2017-05-24 08:45:05 +0800 | [diff] [blame] | 20 | newline: |
| 21 | .asciz "\n" |
| 22 | spacer: |
| 23 | .asciz ":\t\t0x" |
| 24 | |
| 25 | .section .rodata.cci_reg_name, "aS" |
| 26 | cci_iface_regs: |
| 27 | .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , "" |
| 28 | |
| 29 | /* --------------------------------------------- |
| 30 | * The below macro prints out relevant GIC |
| 31 | * registers whenever an unhandled exception is |
| 32 | * taken in BL31. |
| 33 | * --------------------------------------------- |
| 34 | */ |
| 35 | .macro plat_crash_print_regs |
| 36 | mov_imm x16, PLAT_ARM_GICD_BASE |
| 37 | mov_imm x17, PLAT_ARM_GICC_BASE |
| 38 | |
| 39 | /* Load the gicc reg list to x6 */ |
| 40 | adr x6, gicc_regs |
| 41 | /* Load the gicc regs to gp regs used by str_in_crash_buf_print */ |
| 42 | ldr w8, [x17, #GICC_HPPIR] |
| 43 | ldr w9, [x17, #GICC_AHPPIR] |
| 44 | ldr w10, [x17, #GICC_CTLR] |
| 45 | /* Store to the crash buf and print to cosole */ |
| 46 | bl str_in_crash_buf_print |
| 47 | |
| 48 | /* Print the GICD_ISPENDR regs */ |
| 49 | add x7, x16, #GICD_ISPENDR |
| 50 | adr x4, gicd_pend_reg |
| 51 | bl asm_print_str |
| 52 | 2: |
| 53 | sub x4, x7, x16 |
| 54 | cmp x4, #0x280 |
| 55 | b.eq 1f |
| 56 | bl asm_print_hex |
| 57 | adr x4, spacer |
| 58 | bl asm_print_str |
| 59 | ldr x4, [x7], #8 |
| 60 | bl asm_print_hex |
| 61 | adr x4, newline |
| 62 | bl asm_print_str |
| 63 | b 2b |
| 64 | 1: |
| 65 | adr x6, cci_iface_regs |
| 66 | /* Store in x7 the base address of the first interface */ |
| 67 | mov_imm x7, (CCI400_BASE + SLAVE_IFACE_OFFSET( \ |
| 68 | CCI400_SL_IFACE3_CLUSTER_IX)) |
| 69 | ldr w8, [x7, #SNOOP_CTRL_REG] |
| 70 | /* Store in x7 the base address of the second interface */ |
| 71 | mov_imm x7, (CCI400_BASE + SLAVE_IFACE_OFFSET( \ |
| 72 | CCI400_SL_IFACE4_CLUSTER_IX)) |
| 73 | ldr w9, [x7, #SNOOP_CTRL_REG] |
| 74 | /* Store to the crash buf and print to console */ |
| 75 | bl str_in_crash_buf_print |
| 76 | .endm |
| 77 | |
| 78 | #endif /* __PLAT_MACROS_S__ */ |