blob: 8acc8b5ee1de30fbcf1932dae3fef7c6a29ee1df [file] [log] [blame]
Michal Simek91794362022-08-31 16:45:14 +02001/*
2 * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
3 * Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved.
4 * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9#include <assert.h>
10
11#include <common/debug.h>
12#include <lib/mmio.h>
13#include <lib/psci/psci.h>
14#include <plat/arm/common/plat_arm.h>
15#include <plat/common/platform.h>
16#include <plat_arm.h>
17
18#include <plat_private.h>
19
20static uintptr_t versal_net_sec_entry;
21
22static const struct plat_psci_ops versal_net_nopmc_psci_ops = {
23};
24
25/*******************************************************************************
26 * Export the platform specific power ops.
27 ******************************************************************************/
28int32_t plat_setup_psci_ops(uintptr_t sec_entrypoint,
29 const struct plat_psci_ops **psci_ops)
30{
31 versal_net_sec_entry = sec_entrypoint;
32
33 VERBOSE("Setting up entry point %lx\n", versal_net_sec_entry);
34
35 *psci_ops = &versal_net_nopmc_psci_ops;
36
37 return 0;
38}