blob: e8e25ef0a4bda273ad1c68c069ec4030ee85579f [file] [log] [blame]
Varun Wadekarb316e242015-05-19 16:48:04 +05301#
Varun Wadekar28dcc212016-07-20 10:28:51 -07002# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Varun Wadekarb316e242015-05-19 16:48:04 +05303#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are met:
6#
7# Redistributions of source code must retain the above copyright notice, this
8# list of conditions and the following disclaimer.
9#
10# Redistributions in binary form must reproduce the above copyright notice,
11# this list of conditions and the following disclaimer in the documentation
12# and/or other materials provided with the distribution.
13#
14# Neither the name of ARM nor the names of its contributors may be used
15# to endorse or promote products derived from this software without specific
16# prior written permission.
17#
18# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28# POSSIBILITY OF SUCH DAMAGE.
29#
30
31CRASH_REPORTING := 1
32$(eval $(call add_define,CRASH_REPORTING))
33
34ASM_ASSERTION := 1
35$(eval $(call add_define,ASM_ASSERTION))
36
Varun Wadekar207cc732015-07-08 12:57:50 +053037USE_COHERENT_MEM := 0
38
Varun Wadekar3fb854f2017-02-28 08:23:59 -080039SEPARATE_CODE_AND_RODATA := 1
40
Varun Wadekarb5132322017-04-10 15:30:17 -070041PLAT_XLAT_TABLES_DYNAMIC := 1
42$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
43
Varun Wadekarb316e242015-05-19 16:48:04 +053044PLAT_INCLUDES := -Iplat/nvidia/tegra/include/drivers \
45 -Iplat/nvidia/tegra/include \
46 -Iplat/nvidia/tegra/include/${TARGET_SOC}
47
Varun Wadekarb5132322017-04-10 15:30:17 -070048include lib/xlat_tables_v2/xlat_tables.mk
49PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
Varun Wadekarb316e242015-05-19 16:48:04 +053050
51COMMON_DIR := plat/nvidia/tegra/common
52
Varun Wadekard3a41502015-06-16 11:23:00 +053053BL31_SOURCES += drivers/arm/gic/gic_v2.c \
Soby Mathew17231132016-08-08 12:33:06 +010054 drivers/console/aarch64/console.S \
Varun Wadekarbc74fec2015-07-16 15:47:03 +053055 drivers/delay_timer/delay_timer.c \
Soby Mathew17231132016-08-08 12:33:06 +010056 drivers/ti/uart/aarch64/16550_console.S \
Varun Wadekarb316e242015-05-19 16:48:04 +053057 ${COMMON_DIR}/aarch64/tegra_helpers.S \
Varun Wadekarb316e242015-05-19 16:48:04 +053058 ${COMMON_DIR}/drivers/pmc/pmc.c \
Varun Wadekarb316e242015-05-19 16:48:04 +053059 ${COMMON_DIR}/tegra_bl31_setup.c \
Varun Wadekarbc74fec2015-07-16 15:47:03 +053060 ${COMMON_DIR}/tegra_delay_timer.c \
Varun Wadekardc799302015-12-28 16:36:42 -080061 ${COMMON_DIR}/tegra_fiq_glue.c \
Varun Wadekarb316e242015-05-19 16:48:04 +053062 ${COMMON_DIR}/tegra_gic.c \
Varun Wadekar28dcc212016-07-20 10:28:51 -070063 ${COMMON_DIR}/tegra_platform.c \
Varun Wadekarb316e242015-05-19 16:48:04 +053064 ${COMMON_DIR}/tegra_pm.c \
Varun Wadekar923d04a2015-12-09 18:18:53 -080065 ${COMMON_DIR}/tegra_sip_calls.c \
Varun Wadekarb316e242015-05-19 16:48:04 +053066 ${COMMON_DIR}/tegra_topology.c