| Oliver Swede | 8fed2fe | 2019-11-11 11:11:06 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include <common/bl_common.h> |
| 10 | #include <platform_def.h> |
| 11 | |
| 12 | .globl plat_get_my_entrypoint |
| 13 | .globl plat_secondary_cold_boot_setup |
| 14 | .globl plat_is_my_cpu_primary |
| 15 | .globl platform_mem_init |
| 16 | .globl plat_my_core_pos |
| 17 | .globl plat_fpga_calc_core_pos |
| 18 | .globl plat_crash_console_init |
| 19 | .globl plat_crash_console_putc |
| 20 | .globl plat_crash_console_flush |
| 21 | |
| 22 | /* ----------------------------------------------------------------------- |
| 23 | * unsigned long plat_get_my_entrypoint (void); |
| 24 | * TODO: determine if warm boot should be supported for FPGA images |
| 25 | * ----------------------------------------------------------------------- |
| 26 | */ |
| 27 | func plat_get_my_entrypoint |
| 28 | mov x0, #0 |
| 29 | ret |
| 30 | endfunc plat_get_my_entrypoint |
| 31 | |
| 32 | /* ----------------------------------------------------------------------- |
| 33 | * void plat_secondary_cold_boot_setup (void); |
| 34 | * TODO: add placeholder PSCI implementation for FPGA images |
| 35 | * ----------------------------------------------------------------------- |
| 36 | */ |
| 37 | func plat_secondary_cold_boot_setup |
| 38 | ret |
| 39 | endfunc plat_secondary_cold_boot_setup |
| 40 | |
| 41 | /* ----------------------------------------------------------------------- |
| 42 | * unsigned int plat_is_my_cpu_primary (void); |
| 43 | * |
| 44 | * Find out whether the current cpu is the primary cpu |
| 45 | * ----------------------------------------------------------------------- |
| 46 | */ |
| 47 | func plat_is_my_cpu_primary |
| 48 | mrs x0, mpidr_el1 |
| 49 | mov_imm x1, MPIDR_AFFINITY_MASK |
| 50 | and x0, x0, x1 |
| 51 | cmp x0, #FPGA_PRIMARY_CPU |
| 52 | cset w0, eq |
| 53 | ret |
| 54 | endfunc plat_is_my_cpu_primary |
| 55 | |
| 56 | func platform_mem_init |
| 57 | ret |
| 58 | endfunc platform_mem_init |
| 59 | |
| 60 | func plat_my_core_pos |
| 61 | mrs x0, mpidr_el1 |
| 62 | b plat_fpga_calc_core_pos |
| 63 | endfunc plat_my_core_pos |
| 64 | |
| 65 | /* ----------------------------------------------------------------------- |
| 66 | * unsigned int plat_fpga_calc_core_pos(u_register_t mpidr) |
| 67 | * TODO: add calculation of the core position for FPGA image CPUs |
| 68 | * ----------------------------------------------------------------------- |
| 69 | */ |
| 70 | func plat_fpga_calc_core_pos |
| 71 | mov x0, #0 |
| 72 | ret |
| 73 | endfunc plat_fpga_calc_core_pos |
| 74 | |
| 75 | func plat_crash_console_init |
| 76 | mov_imm x0, PLAT_FPGA_CRASH_UART_BASE |
| 77 | mov_imm x1, PLAT_FPGA_CRASH_UART_CLK_IN_HZ |
| 78 | mov_imm x2, PLAT_FPGA_CONSOLE_BAUDRATE |
| 79 | b console_pl011_core_init |
| 80 | endfunc plat_crash_console_init |
| 81 | |
| 82 | func plat_crash_console_putc |
| 83 | mov_imm x1, PLAT_FPGA_CRASH_UART_BASE |
| 84 | b console_pl011_core_putc |
| 85 | endfunc plat_crash_console_putc |
| 86 | |
| 87 | func plat_crash_console_flush |
| 88 | mov_imm x0, PLAT_FPGA_CRASH_UART_BASE |
| 89 | b console_pl011_core_flush |
| 90 | endfunc plat_crash_console_flush |