Aditya Angadi | ac0e0d3 | 2021-02-17 18:46:22 +0530 | [diff] [blame] | 1 | # Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved. |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 2 | # |
| 3 | # SPDX-License-Identifier: BSD-3-Clause |
| 4 | # |
| 5 | |
| 6 | # Enable GICv4 extension with multichip driver |
| 7 | GIC_ENABLE_V4_EXTN := 1 |
| 8 | GICV3_IMPL_GIC600_MULTICHIP := 1 |
| 9 | |
| 10 | include plat/arm/css/sgi/sgi-common.mk |
| 11 | |
Aditya Angadi | f503903 | 2020-12-15 17:28:08 +0530 | [diff] [blame] | 12 | RDV1MC_BASE = plat/arm/board/rdv1mc |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 13 | |
Aditya Angadi | f503903 | 2020-12-15 17:28:08 +0530 | [diff] [blame] | 14 | PLAT_INCLUDES += -I${RDV1MC_BASE}/include/ |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 15 | |
Jimmy Brisson | 958a0b1 | 2020-09-30 15:28:03 -0500 | [diff] [blame] | 16 | SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_v1.S |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 17 | |
Aditya Angadi | 502d0ac | 2020-11-18 08:27:15 +0530 | [diff] [blame] | 18 | PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat.c |
| 19 | |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 20 | BL1_SOURCES += ${SGI_CPU_SOURCES} \ |
Aditya Angadi | f503903 | 2020-12-15 17:28:08 +0530 | [diff] [blame] | 21 | ${RDV1MC_BASE}/rdv1mc_err.c |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 22 | |
Aditya Angadi | f503903 | 2020-12-15 17:28:08 +0530 | [diff] [blame] | 23 | BL2_SOURCES += ${RDV1MC_BASE}/rdv1mc_plat.c \ |
| 24 | ${RDV1MC_BASE}/rdv1mc_security.c \ |
| 25 | ${RDV1MC_BASE}/rdv1mc_err.c \ |
Aditya Angadi | ac0e0d3 | 2021-02-17 18:46:22 +0530 | [diff] [blame] | 26 | drivers/arm/tzc/tzc400.c \ |
| 27 | plat/arm/common/arm_tzc400.c \ |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 28 | lib/utils/mem_region.c \ |
| 29 | plat/arm/common/arm_nor_psci_mem_protect.c |
| 30 | |
| 31 | BL31_SOURCES += ${SGI_CPU_SOURCES} \ |
Aditya Angadi | f503903 | 2020-12-15 17:28:08 +0530 | [diff] [blame] | 32 | ${RDV1MC_BASE}/rdv1mc_plat.c \ |
| 33 | ${RDV1MC_BASE}/rdv1mc_topology.c \ |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 34 | drivers/cfi/v2m/v2m_flash.c \ |
| 35 | drivers/arm/gic/v3/gic600_multichip.c \ |
| 36 | lib/utils/mem_region.c \ |
| 37 | plat/arm/common/arm_nor_psci_mem_protect.c |
| 38 | |
Vijayenthiran Subramaniam | 01ce6fe | 2020-07-14 15:51:37 +0530 | [diff] [blame] | 39 | ifeq (${TRUSTED_BOARD_BOOT}, 1) |
Aditya Angadi | f503903 | 2020-12-15 17:28:08 +0530 | [diff] [blame] | 40 | BL1_SOURCES += ${RDV1MC_BASE}/rdv1mc_trusted_boot.c |
| 41 | BL2_SOURCES += ${RDV1MC_BASE}/rdv1mc_trusted_boot.c |
Vijayenthiran Subramaniam | 01ce6fe | 2020-07-14 15:51:37 +0530 | [diff] [blame] | 42 | endif |
| 43 | |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 44 | # Enable dynamic addition of MMAP regions in BL31 |
| 45 | BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC |
| 46 | |
| 47 | # Add the FDT_SOURCES and options for Dynamic Config |
Aditya Angadi | f503903 | 2020-12-15 17:28:08 +0530 | [diff] [blame] | 48 | FDT_SOURCES += ${RDV1MC_BASE}/fdts/${PLAT}_fw_config.dts \ |
| 49 | ${RDV1MC_BASE}/fdts/${PLAT}_tb_fw_config.dts |
Manish V Badarkhe | 64616a5 | 2020-05-31 08:53:40 +0100 | [diff] [blame] | 50 | FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb |
| 51 | TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 52 | |
Manish V Badarkhe | 64616a5 | 2020-05-31 08:53:40 +0100 | [diff] [blame] | 53 | # Add the FW_CONFIG to FIP and specify the same to certtool |
Anders Dellien | 3f69474 | 2020-08-23 19:32:48 +0100 | [diff] [blame] | 54 | $(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 55 | # Add the TB_FW_CONFIG to FIP and specify the same to certtool |
Anders Dellien | 3f69474 | 2020-08-23 19:32:48 +0100 | [diff] [blame] | 56 | $(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 57 | |
| 58 | $(eval $(call CREATE_SEQ,SEQ,4)) |
| 59 | ifneq ($(CSS_SGI_CHIP_COUNT),$(filter $(CSS_SGI_CHIP_COUNT),$(SEQ))) |
Aditya Angadi | f503903 | 2020-12-15 17:28:08 +0530 | [diff] [blame] | 60 | $(error "Chip count for RD-V1-MC should be either $(SEQ) \ |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 61 | currently it is set to ${CSS_SGI_CHIP_COUNT}.") |
| 62 | endif |
| 63 | |
Aditya Angadi | f503903 | 2020-12-15 17:28:08 +0530 | [diff] [blame] | 64 | FDT_SOURCES += ${RDV1MC_BASE}/fdts/${PLAT}_nt_fw_config.dts |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 65 | NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb |
| 66 | |
| 67 | # Add the NT_FW_CONFIG to FIP and specify the same to certtool |
Anders Dellien | 3f69474 | 2020-08-23 19:32:48 +0100 | [diff] [blame] | 68 | $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG})) |
Aditya Angadi | cdd7f63 | 2020-04-06 17:11:23 +0530 | [diff] [blame] | 69 | |
| 70 | override CTX_INCLUDE_AARCH32_REGS := 0 |
Andre Przywara | 0b7f1b0 | 2023-03-21 13:53:19 +0000 | [diff] [blame] | 71 | override ENABLE_FEAT_AMU := 1 |
Aditya Angadi | 0640222 | 2021-03-20 12:06:15 +0530 | [diff] [blame] | 72 | |
| 73 | ifneq ($(CSS_SGI_PLATFORM_VARIANT),0) |
| 74 | $(error "CSS_SGI_PLATFORM_VARIANT for RD-V1-MC should always be 0, \ |
| 75 | currently set to ${CSS_SGI_PLATFORM_VARIANT}.") |
| 76 | endif |
Nuno Lopes | 8f3bd47 | 2023-11-28 12:19:24 +0000 | [diff] [blame^] | 77 | |
| 78 | # Enable the flag since RD-V1-MC has a system level cache |
| 79 | NEOVERSE_Nx_EXTERNAL_LLC := 1 |