| Varun Wadekar | 5b7c50d | 2020-06-11 21:53:09 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <assert.h> |
| 8 | |
| 9 | #include <common/bl_common.h> |
| 10 | #include <drivers/arm/gicv3.h> |
| 11 | #include <lib/utils.h> |
| 12 | |
| 13 | #include <plat/common/platform.h> |
| 14 | #include <platform_def.h> |
| 15 | #include <tegra_private.h> |
| 16 | #include <tegra_def.h> |
| 17 | |
| 18 | /* The GICv3 driver only needs to be initialized in EL3 */ |
| 19 | static uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT]; |
| 20 | |
| 21 | static unsigned int plat_tegra_mpidr_to_core_pos(unsigned long mpidr) |
| 22 | { |
| 23 | return (unsigned int)plat_core_pos_by_mpidr(mpidr); |
| 24 | } |
| 25 | |
| 26 | /****************************************************************************** |
| 27 | * Tegra common helper to setup the GICv3 driver data. |
| 28 | *****************************************************************************/ |
| 29 | void tegra_gic_setup(const interrupt_prop_t *interrupt_props, |
| 30 | unsigned int interrupt_props_num) |
| 31 | { |
| 32 | /* |
| 33 | * Tegra GIC configuration settings |
| 34 | */ |
| 35 | static gicv3_driver_data_t tegra_gic_data; |
| 36 | |
| 37 | /* |
| 38 | * Register Tegra GICv3 driver |
| 39 | */ |
| 40 | tegra_gic_data.gicd_base = TEGRA_GICD_BASE; |
| 41 | tegra_gic_data.gicr_base = TEGRA_GICR_BASE; |
| 42 | tegra_gic_data.rdistif_num = PLATFORM_CORE_COUNT; |
| 43 | tegra_gic_data.rdistif_base_addrs = rdistif_base_addrs; |
| 44 | tegra_gic_data.mpidr_to_core_pos = plat_tegra_mpidr_to_core_pos; |
| 45 | tegra_gic_data.interrupt_props = interrupt_props; |
| 46 | tegra_gic_data.interrupt_props_num = interrupt_props_num; |
| 47 | gicv3_driver_init(&tegra_gic_data); |
| 48 | |
| 49 | /* initialize the GICD and GICR */ |
| 50 | tegra_gic_init(); |
| 51 | } |
| 52 | |
| 53 | /****************************************************************************** |
| 54 | * Tegra common helper to initialize the GICv3 only driver. |
| 55 | *****************************************************************************/ |
| 56 | void tegra_gic_init(void) |
| 57 | { |
| 58 | gicv3_distif_init(); |
| 59 | gicv3_rdistif_init(plat_my_core_pos()); |
| 60 | gicv3_cpuif_enable(plat_my_core_pos()); |
| 61 | } |
| 62 | |
| 63 | /****************************************************************************** |
| 64 | * Tegra common helper to disable the GICv3 CPU interface |
| 65 | *****************************************************************************/ |
| 66 | void tegra_gic_cpuif_deactivate(void) |
| 67 | { |
| 68 | gicv3_cpuif_disable(plat_my_core_pos()); |
| 69 | } |
| 70 | |
| 71 | /****************************************************************************** |
| 72 | * Tegra common helper to initialize the per cpu distributor interface |
| 73 | * in GICv3 |
| 74 | *****************************************************************************/ |
| 75 | void tegra_gic_pcpu_init(void) |
| 76 | { |
| 77 | gicv3_rdistif_init(plat_my_core_pos()); |
| 78 | gicv3_cpuif_enable(plat_my_core_pos()); |
| 79 | } |