blob: 9594a2a8dc3dd30f21e9ae3a5ebdb82aa1743192 [file] [log] [blame]
Aziz IDOMARd3fbce72023-12-19 19:43:52 +00001/*
2 * Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef MHU_V3_X_PRIVATE_H
8#define MHU_V3_X_PRIVATE_H
9
10#include <stdint.h>
11
12/* Flag for PDBCW Interrupt Transfer Acknowledgment */
13#define MHU_V3_X_PDBCW_INT_X_TFR_ACK 0x1
14
15/* Flag for PDBCW CTRL Postbox combined interrupts enable */
16#define MHU_V3_X_PDBCW_CTRL_PBX_COMB_EN 0x1
17
18/* Flag for MDBCW CTRL Mailbox combined interrupts enable */
19#define MHU_V3_X_MDBCW_CTRL_MBX_COMB_EN 0x1
20
21/**
22 * Postbox control page structure
23 */
24struct _mhu_v3_x_pbx_ctrl_reg_t {
25 /* Offset: 0x000 (R/ ) Postbox Block Identifier */
26 const volatile uint32_t pbx_blk_id;
27 /* Offset: 0x004 (R/ ) Reserved */
28 const volatile uint8_t reserved_0[0x10 - 0x04];
29 /* Offset: 0x010 (R/ ) Postbox Feature Support 0 */
30 const volatile uint32_t pbx_feat_spt0;
31 /* Offset: 0x014 (R/ ) Postbox Feature Support 1 */
32 const volatile uint32_t pbx_feat_spt1;
33 /* Offset: 0x018 (R/ ) Reserved */
34 const volatile uint8_t reserved_1[0x20 - 0x18];
35 /* Offset: 0x020 (R/ ) Postbox Doorbell Channel Configuration 0 */
36 const volatile uint32_t pbx_dbch_cfg0;
37 /* Offset: 0x024 (R/ ) Reserved */
38 const volatile uint8_t reserved_2[0x30 - 0x24];
39 /* Offset: 0x030 (R/ ) Postbox FIFO Channel Configuration 0 */
40 const volatile uint32_t pbx_ffch_cfg0;
41 /* Offset: 0x034 (R/ ) Reserved */
42 const volatile uint8_t reserved_3[0x40 - 0x34];
43 /* Offset: 0x040 (R/ ) Postbox Fast Channel Configuration 0 */
44 const volatile uint32_t pbx_fch_cfg0;
45 /* Offset: 0x044 (R/ ) Reserved */
46 const volatile uint8_t reserved_4[0x100 - 0x44];
47 /* Offset: 0x100 (R/W) Postbox control */
48 volatile uint32_t pbx_ctrl;
49 /* Offset: 0x164 (R/ ) Reserved */
50 const volatile uint8_t reserved_5[0x400 - 0x104];
51 /*
52 * Offset: 0x400 (R/ ) Postbox Doorbell Channel Interrupt Status n,
53 * where n is 0 - 3.
54 */
55 const volatile uint32_t pbx_dbch_int_st[4];
56 /*
57 * Offset: 0x410 (R/ ) Postbox FIFO Channel <n> Interrupt Status n,
58 * where n is 0 - 1.
59 */
60 const volatile uint32_t pbx_ffch_int_st[2];
61 /* Offset: 0x418 (R/ ) Reserved */
62 const uint8_t reserved_6[0xFC8 - 0x418];
63 /* Offset: 0xFC8 (R/ ) Postbox Implementer Identification Register */
64 const volatile uint32_t pbx_iidr;
65 /* Offset: 0xFCC (R/ ) Postbox Architecture Identification Register */
66 const volatile uint32_t pbx_aidr;
67 /*
68 * Offset: 0xFD0 (R/ ) Postbox Implementation Defined Identification
69 * Register n, where n is 0 - 11.
70 */
71 const volatile uint32_t impl_def_id[12];
72};
73
74/**
75 * Postbox doorbell channel window page structure
76 */
77struct _mhu_v3_x_pdbcw_reg_t {
78 /* Offset: 0x000 (R/ ) Postbox Doorbell Channel Window Status */
79 const volatile uint32_t pdbcw_st;
80 /* Offset: 0x004 (R/ ) Reserved */
81 const uint8_t reserved_0[0xC - 0x4];
82 /* Offset: 0x00C ( /W) Postbox Doorbell Channel Window Set */
83 volatile uint32_t pdbcw_set;
84 /*
85 * Offset: 0x010 (R/ ) Postbox Doorbell Channel Window Interrupt Status
86 */
87 const volatile uint32_t pdbcw_int_st;
88 /*
89 * Offset: 0x014 ( /W) Postbox Doorbell Channel Window Interrupt Clear
90 */
91 volatile uint32_t pdbcw_int_clr;
92 /*
93 * Offset: 0x018 (R/W) Postbox Doorbell Channel Window Interrupt Enable
94 */
95 volatile uint32_t pdbcw_int_en;
96 /* Offset: 0x01C (R/W) Postbox Doorbell Channel Window Control */
97 volatile uint32_t pdbcw_ctrl;
98};
99
100/**
101 * Postbox structure
102 */
103struct _mhu_v3_x_pbx {
104 /* Postbox Control */
105 struct _mhu_v3_x_pbx_ctrl_reg_t pbx_ctrl_page;
106 /* Postbox Doorbell Channel Window */
107 struct _mhu_v3_x_pdbcw_reg_t pdbcw_page;
108};
109
110/**
111 * Mailbox control page structure
112 */
113struct _mhu_v3_x_mbx_ctrl_reg_t {
114 /* Offset: 0x000 (R/ ) Mailbox Block Identifier */
115 const volatile uint32_t mbx_blk_id;
116 /* Offset: 0x004 (R/ ) Reserved */
117 const volatile uint8_t reserved_0[0x10 - 0x04];
118 /* Offset: 0x010 (R/ ) Mailbox Feature Support 0 */
119 const volatile uint32_t mbx_feat_spt0;
120 /* Offset: 0x014 (R/ ) Mailbox Feature Support 1 */
121 const volatile uint32_t mbx_feat_spt1;
122 /* Offset: 0x018 (R/ ) Reserved */
123 const volatile uint8_t reserved_1[0x20 - 0x18];
124 /* Offset: 0x020 (R/ ) Mailbox Doorbell Channel Configuration 0 */
125 const volatile uint32_t mbx_dbch_cfg0;
126 /* Offset: 0x024 (R/ ) Reserved */
127 const volatile uint8_t reserved_2[0x30 - 0x24];
128 /* Offset: 0x030 (R/ ) Mailbox FIFO Channel Configuration 0 */
129 const volatile uint32_t mbx_ffch_cfg0;
130 /* Offset: 0x034 (R/ ) Reserved */
131 const volatile uint8_t reserved_4[0x40 - 0x34];
132 /* Offset: 0x040 (R/ ) Mailbox Fast Channel Configuration 0 */
133 const volatile uint32_t mbx_fch_cfg0;
134 /* Offset: 0x044 (R/ ) Reserved */
135 const volatile uint8_t reserved_5[0x100 - 0x44];
136 /* Offset: 0x100 (R/W) Mailbox control */
137 volatile uint32_t mbx_ctrl;
138 /* Offset: 0x104 (R/ ) Reserved */
139 const volatile uint8_t reserved_6[0x140 - 0x104];
140 /* Offset: 0x140 (R/W) Mailbox Fast Channel control */
141 volatile uint32_t mbx_fch_ctrl;
142 /* Offset: 0x144 (R/W) Mailbox Fast Channel Group Interrupt Enable */
143 volatile uint32_t mbx_fcg_int_en;
144 /* Offset: 0x148 (R/ ) Reserved */
145 const volatile uint8_t reserved_7[0x400 - 0x148];
146 /*
147 * Offset: 0x400 (R/ ) Mailbox Doorbell Channel Interrupt Status n,
148 * where n = 0 - 3.
149 */
150 const volatile uint32_t mbx_dbch_int_st[4];
151 /*
152 * Offset: 0x410 (R/ ) Mailbox FIFO Channel Interrupt Status n, where
153 * n = 0 - 1.
154 */
155 const volatile uint32_t mbx_ffch_int_st[2];
156 /* Offset: 0x418 (R/ ) Reserved */
157 const volatile uint8_t reserved_8[0x470 - 0x418];
158 /* Offset: 0x470 (R/ ) Mailbox Fast Channel Group Interrupt Status */
159 const volatile uint32_t mbx_fcg_int_st;
160 /* Offset: 0x474 (R/ ) Reserved */
161 const volatile uint8_t reserved_9[0x480 - 0x474];
162 /*
163 * Offset: 0x480 (R/ ) Mailbox Fast Channel Group <n> Interrupt Status,
164 * where n = 0 - 31.
165 */
166 const volatile uint32_t mbx_fch_grp_int_st[32];
167 /* Offset: 0x500 (R/ ) Reserved */
168 const volatile uint8_t reserved_10[0xFC8 - 0x500];
169 /* Offset: 0xFC8 (R/ ) Mailbox Implementer Identification Register */
170 const volatile uint32_t mbx_iidr;
171 /* Offset: 0xFCC (R/ ) Mailbox Architecture Identification Register */
172 const volatile uint32_t mbx_aidr;
173 /*
174 * Offset: 0xFD0 (R/ ) Mailbox Implementation Defined Identification
175 * Register n, where n is 0 - 11.
176 */
177 const volatile uint32_t impl_def_id[12];
178};
179
180/**
181 * Mailbox doorbell channel window page structure
182 */
183struct _mhu_v3_x_mdbcw_reg_t {
184 /* Offset: 0x000 (R/ ) Mailbox Doorbell Channel Window Status */
185 const volatile uint32_t mdbcw_st;
186 /* Offset: 0x004 (R/ ) Mailbox Doorbell Channel Window Status Masked */
187 const volatile uint32_t mdbcw_st_msk;
188 /* Offset: 0x008 ( /W) Mailbox Doorbell Channel Window Clear */
189 volatile uint32_t mdbcw_clr;
190 /* Offset: 0x00C (R/ ) Reserved */
191 const volatile uint8_t reserved_0[0x10 - 0x0C];
192 /* Offset: 0x010 (R/ ) Mailbox Doorbell Channel Window Mask Status */
193 const volatile uint32_t mdbcw_msk_st;
194 /* Offset: 0x014 ( /W) Mailbox Doorbell Channel Window Mask Set */
195 volatile uint32_t mdbcw_msk_set;
196 /* Offset: 0x018 ( /W) Mailbox Doorbell Channel Window Mask Clear */
197 volatile uint32_t mdbcw_msk_clr;
198 /* Offset: 0x01C (R/W) Mailbox Doorbell Channel Window Control */
199 volatile uint32_t mdbcw_ctrl;
200};
201
202/**
203 * Mailbox structure
204 */
205struct _mhu_v3_x_mbx {
206 /* Mailbox control */
207 struct _mhu_v3_x_mbx_ctrl_reg_t mbx_ctrl_page;
208 /* Mailbox Doorbell Channel Window */
209 struct _mhu_v3_x_mdbcw_reg_t mdbcw_page;
210};
211
212/**
213 * MHUv3 frame type
214 */
215union _mhu_v3_x_frame_t {
216 /* Postbox Frame */
217 struct _mhu_v3_x_pbx pbx_frame;
218 /* Mailbox Frame */
219 struct _mhu_v3_x_mbx mbx_frame;
220};
221
222#endif /* MHU_V3_X_PRIVATE_H */