| Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
| Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 5 | */ |
| Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 6 | #ifndef CCI_MACROS_S |
| 7 | #define CCI_MACROS_S |
| Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 8 | |
| 9 | #include <cci.h> |
| 10 | #include <platform_def.h> |
| 11 | |
| 12 | .section .rodata.cci_reg_name, "aS" |
| 13 | cci_iface_regs: |
| 14 | .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , "" |
| 15 | |
| 16 | /* ------------------------------------------------ |
| 17 | * The below required platform porting macro prints |
| 18 | * out relevant interconnect registers whenever an |
| 19 | * unhandled exception is taken in BL31. |
| 20 | * Clobbers: x0 - x9, sp |
| 21 | * ------------------------------------------------ |
| 22 | */ |
| Gerald Lejeune | 2c7ed5b | 2015-11-26 15:47:53 +0100 | [diff] [blame] | 23 | .macro print_cci_regs |
| Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 24 | adr x6, cci_iface_regs |
| 25 | /* Store in x7 the base address of the first interface */ |
| 26 | mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \ |
| 27 | PLAT_ARM_CCI_CLUSTER0_SL_IFACE_IX)) |
| 28 | ldr w8, [x7, #SNOOP_CTRL_REG] |
| 29 | /* Store in x7 the base address of the second interface */ |
| 30 | mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \ |
| 31 | PLAT_ARM_CCI_CLUSTER1_SL_IFACE_IX)) |
| 32 | ldr w9, [x7, #SNOOP_CTRL_REG] |
| 33 | /* Store to the crash buf and print to console */ |
| 34 | bl str_in_crash_buf_print |
| 35 | .endm |
| 36 | |
| Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 37 | #endif /* CCI_MACROS_S */ |