blob: 9a7d2cad63a6ddb93a2b3c9e83d19503fec64a8e [file] [log] [blame]
Jorge Ramirez-Ortiz766263c2018-09-23 09:39:56 +02001/*
2 * Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <debug.h>
8#include <mmio.h>
9#include "emmc_config.h"
10#include "emmc_hal.h"
11#include "emmc_std.h"
12#include "emmc_registers.h"
13#include "emmc_def.h"
14#include "micro_delay.h"
15#include "rcar_def.h"
16
17static EMMC_ERROR_CODE emmc_clock_ctrl(uint8_t mode);
18static EMMC_ERROR_CODE emmc_card_init(void);
19static EMMC_ERROR_CODE emmc_high_speed(void);
20static EMMC_ERROR_CODE emmc_bus_width(uint32_t width);
21static uint32_t emmc_set_timeout_register_value(uint32_t freq);
22static void set_sd_clk(uint32_t clkDiv);
23static uint32_t emmc_calc_tran_speed(uint32_t *freq);
24static void emmc_get_partition_access(void);
25static void emmc_set_bootpartition(void);
26
27static void emmc_set_bootpartition(void)
28{
29 uint32_t reg;
30
31 reg = mmio_read_32(RCAR_PRR) & (RCAR_PRODUCT_MASK | RCAR_CUT_MASK);
32 if (reg == RCAR_PRODUCT_M3_CUT10) {
33 mmc_drv_obj.boot_partition_en =
34 (EMMC_PARTITION_ID) ((mmc_drv_obj.ext_csd_data[179] &
35 EMMC_BOOT_PARTITION_EN_MASK) >>
36 EMMC_BOOT_PARTITION_EN_SHIFT);
37 } else if ((reg == RCAR_PRODUCT_H3_CUT20)
38 || (reg == RCAR_PRODUCT_M3_CUT11)) {
39 mmc_drv_obj.boot_partition_en = mmc_drv_obj.partition_access;
40 } else {
41 if ((mmio_read_32(MFISBTSTSR) & MFISBTSTSR_BOOT_PARTITION) !=
42 0U) {
43 mmc_drv_obj.boot_partition_en = PARTITION_ID_BOOT_2;
44 } else {
45 mmc_drv_obj.boot_partition_en = PARTITION_ID_BOOT_1;
46 }
47 }
48}
49
50static EMMC_ERROR_CODE emmc_card_init(void)
51{
52 int32_t retry;
53 uint32_t freq = MMC_400KHZ; /* 390KHz */
54 EMMC_ERROR_CODE result;
55 uint32_t resultCalc;
56
57 /* state check */
58 if ((mmc_drv_obj.initialize != TRUE)
59 || (mmc_drv_obj.card_power_enable != TRUE)
60 || ((GETR_32(SD_INFO2) & SD_INFO2_CBSY) != 0)
61 ) {
62 emmc_write_error_info(EMMC_FUNCNO_CARD_INIT, EMMC_ERR_STATE);
63 return EMMC_ERR_STATE;
64 }
65
66 /* clock on (force change) */
67 mmc_drv_obj.current_freq = 0;
68 mmc_drv_obj.max_freq = MMC_20MHZ;
69 result = emmc_set_request_mmc_clock(&freq);
70 if (result != EMMC_SUCCESS) {
71 emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
72 return EMMC_ERR;
73 }
74
75 rcar_micro_delay(1000U); /* wait 1ms */
76
77 /* Get current access partition */
78 emmc_get_partition_access();
79
80 /* CMD0, arg=0x00000000 */
81 result = emmc_send_idle_cmd(0x00000000);
82 if (result != EMMC_SUCCESS) {
83 emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
84 return result;
85 }
86
87 rcar_micro_delay(200U); /* wait 74clock 390kHz(189.74us) */
88
89 /* CMD1 */
90 emmc_make_nontrans_cmd(CMD1_SEND_OP_COND, EMMC_HOST_OCR_VALUE);
91 for (retry = 300; retry > 0; retry--) {
92 result =
93 emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
94 if (result != EMMC_SUCCESS) {
95 emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
96 return result;
97 }
98
99 if ((mmc_drv_obj.r3_ocr & EMMC_OCR_STATUS_BIT) != 0) {
100 break; /* card is ready. exit loop */
101 }
102 rcar_micro_delay(1000U); /* wait 1ms */
103 }
104
105 if (retry == 0) {
106 emmc_write_error_info(EMMC_FUNCNO_CARD_INIT, EMMC_ERR_TIMEOUT);
107 return EMMC_ERR_TIMEOUT;
108 }
109
110 switch (mmc_drv_obj.r3_ocr & EMMC_OCR_ACCESS_MODE_MASK) {
111 case EMMC_OCR_ACCESS_MODE_SECT:
112 mmc_drv_obj.access_mode = TRUE; /* sector mode */
113 break;
114 default:
115 /* unknown value */
116 emmc_write_error_info(EMMC_FUNCNO_CARD_INIT, EMMC_ERR);
117 return EMMC_ERR;
118 }
119
120 /* CMD2 */
121 emmc_make_nontrans_cmd(CMD2_ALL_SEND_CID_MMC, 0x00000000);
122 mmc_drv_obj.response = (uint32_t *) (&mmc_drv_obj.cid_data[0]); /* use CID special buffer */
123 result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
124 if (result != EMMC_SUCCESS) {
125 emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
126 return result;
127 }
128
129 /* CMD3 */
130 emmc_make_nontrans_cmd(CMD3_SET_RELATIVE_ADDR, EMMC_RCA << 16);
131 result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
132 if (result != EMMC_SUCCESS) {
133 emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
134 return result;
135 }
136
137 /* CMD9 (CSD) */
138 emmc_make_nontrans_cmd(CMD9_SEND_CSD, EMMC_RCA << 16);
139 mmc_drv_obj.response = (uint32_t *) (&mmc_drv_obj.csd_data[0]); /* use CSD special buffer */
140 result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
141 if (result != EMMC_SUCCESS) {
142 emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
143 return result;
144 }
145
146 /* card version check */
147 if (EMMC_CSD_SPEC_VARS() < 4) {
148 emmc_write_error_info(EMMC_FUNCNO_CARD_INIT,
149 EMMC_ERR_ILLEGAL_CARD);
150 return EMMC_ERR_ILLEGAL_CARD;
151 }
152
153 /* CMD7 (select card) */
154 emmc_make_nontrans_cmd(CMD7_SELECT_CARD, EMMC_RCA << 16);
155 result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
156 if (result != EMMC_SUCCESS) {
157 emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
158 return result;
159 }
160
161 mmc_drv_obj.selected = TRUE;
162
163 /* card speed check */
164 resultCalc = emmc_calc_tran_speed(&freq); /* Card spec is calculated from TRAN_SPEED(CSD). */
165 if (resultCalc == 0) {
166 emmc_write_error_info(EMMC_FUNCNO_CARD_INIT,
167 EMMC_ERR_ILLEGAL_CARD);
168 return EMMC_ERR_ILLEGAL_CARD;
169 }
170 mmc_drv_obj.max_freq = freq; /* max frequency (card spec) */
171
172 result = emmc_set_request_mmc_clock(&freq);
173 if (result != EMMC_SUCCESS) {
174 emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
175 return EMMC_ERR;
176 }
177
178 /* set read/write timeout */
179 mmc_drv_obj.data_timeout = emmc_set_timeout_register_value(freq);
180 SETR_32(SD_OPTION,
181 ((GETR_32(SD_OPTION) & ~(SD_OPTION_TIMEOUT_CNT_MASK)) |
182 mmc_drv_obj.data_timeout));
183
184 /* SET_BLOCKLEN(512byte) */
185 /* CMD16 */
186 emmc_make_nontrans_cmd(CMD16_SET_BLOCKLEN, EMMC_BLOCK_LENGTH);
187 result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
188 if (result != EMMC_SUCCESS) {
189 emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
190 return result;
191 }
192
193 /* Transfer Data Length */
194 SETR_32(SD_SIZE, EMMC_BLOCK_LENGTH);
195
196 /* CMD8 (EXT_CSD) */
197 emmc_make_trans_cmd(CMD8_SEND_EXT_CSD, 0x00000000,
198 (uint32_t *) (&mmc_drv_obj.ext_csd_data[0]),
199 EMMC_MAX_EXT_CSD_LENGTH, HAL_MEMCARD_READ,
200 HAL_MEMCARD_NOT_DMA);
201 result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
202 if (result != EMMC_SUCCESS) {
203 /* CMD12 is not send.
204 * If BUS initialization is failed, user must be execute Bus initialization again.
205 * Bus initialization is start CMD0(soft reset command).
206 */
207 emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
208 return result;
209 }
210
211 /* Set boot partition */
212 emmc_set_bootpartition();
213
214 return EMMC_SUCCESS;
215}
216
217static EMMC_ERROR_CODE emmc_high_speed(void)
218{
219 uint32_t freq; /**< High speed mode clock frequency */
220 EMMC_ERROR_CODE result;
221 uint8_t cardType;
222
223 /* state check */
224 if (mmc_drv_obj.selected != TRUE) {
225 emmc_write_error_info(EMMC_FUNCNO_HIGH_SPEED, EMMC_ERR_STATE);
226 return EMMC_ERR_STATE;
227 }
228
229 /* max frequency */
230 cardType = (uint8_t) mmc_drv_obj.ext_csd_data[EMMC_EXT_CSD_CARD_TYPE];
231 if ((cardType & EMMC_EXT_CSD_CARD_TYPE_52MHZ) != 0)
232 freq = MMC_52MHZ;
233 else if ((cardType & EMMC_EXT_CSD_CARD_TYPE_26MHZ) != 0)
234 freq = MMC_26MHZ;
235 else
236 freq = MMC_20MHZ;
237
238 /* Hi-Speed-mode selction */
239 if ((MMC_52MHZ == freq) || (MMC_26MHZ == freq)) {
240 /* CMD6 */
241 emmc_make_nontrans_cmd(CMD6_SWITCH, EMMC_SWITCH_HS_TIMING);
242 result =
243 emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
244 if (result != EMMC_SUCCESS) {
245 emmc_write_error_info_func_no(EMMC_FUNCNO_HIGH_SPEED);
246 return result;
247 }
248
249 mmc_drv_obj.hs_timing = TIMING_HIGH_SPEED; /* High-Speed */
250 }
251
252 /* set mmc clock */
253 mmc_drv_obj.max_freq = freq;
254 result = emmc_set_request_mmc_clock(&freq);
255 if (result != EMMC_SUCCESS) {
256 emmc_write_error_info_func_no(EMMC_FUNCNO_HIGH_SPEED);
257 return EMMC_ERR;
258 }
259
260 /* set read/write timeout */
261 mmc_drv_obj.data_timeout = emmc_set_timeout_register_value(freq);
262 SETR_32(SD_OPTION,
263 ((GETR_32(SD_OPTION) & ~(SD_OPTION_TIMEOUT_CNT_MASK)) |
264 mmc_drv_obj.data_timeout));
265
266 /* CMD13 */
267 emmc_make_nontrans_cmd(CMD13_SEND_STATUS, EMMC_RCA << 16);
268 result =
269 emmc_exec_cmd(EMMC_R1_ERROR_MASK_WITHOUT_CRC, mmc_drv_obj.response);
270 if (result != EMMC_SUCCESS) {
271 emmc_write_error_info_func_no(EMMC_FUNCNO_HIGH_SPEED);
272 return result;
273 }
274
275 return EMMC_SUCCESS;
276}
277
278static EMMC_ERROR_CODE emmc_clock_ctrl(uint8_t mode)
279{
280 uint32_t value;
281
282 /* busy check */
283 if ((GETR_32(SD_INFO2) & SD_INFO2_CBSY) != 0) {
284 emmc_write_error_info(EMMC_FUNCNO_SET_CLOCK,
285 EMMC_ERR_CARD_BUSY);
286 return EMMC_ERR;
287 }
288
289 if (mode == TRUE) {
290 /* clock ON */
291 value =
292 ((GETR_32(SD_CLK_CTRL) | MMC_SD_CLK_START) &
293 SD_CLK_WRITE_MASK);
294 SETR_32(SD_CLK_CTRL, value); /* on */
295 mmc_drv_obj.clock_enable = TRUE;
296 } else {
297 /* clock OFF */
298 value =
299 ((GETR_32(SD_CLK_CTRL) & MMC_SD_CLK_STOP) &
300 SD_CLK_WRITE_MASK);
301 SETR_32(SD_CLK_CTRL, value); /* off */
302 mmc_drv_obj.clock_enable = FALSE;
303 }
304
305 return EMMC_SUCCESS;
306}
307
308static EMMC_ERROR_CODE emmc_bus_width(uint32_t width)
309{
310 EMMC_ERROR_CODE result = EMMC_ERR;
311
312 /* parameter check */
313 if ((width != 8) && (width != 4) && (width != 1)) {
314 emmc_write_error_info(EMMC_FUNCNO_BUS_WIDTH, EMMC_ERR_PARAM);
315 return EMMC_ERR_PARAM;
316 }
317
318 /* state check */
319 if (mmc_drv_obj.selected != TRUE) {
320 emmc_write_error_info(EMMC_FUNCNO_BUS_WIDTH, EMMC_ERR_STATE);
321 return EMMC_ERR_STATE;
322 }
323
324 mmc_drv_obj.bus_width = (HAL_MEMCARD_DATA_WIDTH) (width >> 2); /* 2 = 8bit, 1 = 4bit, 0 =1bit */
325
326 /* CMD6 */
327 emmc_make_nontrans_cmd(CMD6_SWITCH,
328 (EMMC_SWITCH_BUS_WIDTH_1 |
329 (mmc_drv_obj.bus_width << 8)));
330 result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
331 if (result != EMMC_SUCCESS) {
332 /* occurred error */
333 mmc_drv_obj.bus_width = HAL_MEMCARD_DATA_WIDTH_1_BIT;
334 goto EXIT;
335 }
336
337 switch (mmc_drv_obj.bus_width) {
338 case HAL_MEMCARD_DATA_WIDTH_1_BIT:
339 SETR_32(SD_OPTION,
340 ((GETR_32(SD_OPTION) & ~(BIT15 | BIT13)) | BIT15));
341 break;
342 case HAL_MEMCARD_DATA_WIDTH_4_BIT:
343 SETR_32(SD_OPTION, (GETR_32(SD_OPTION) & ~(BIT15 | BIT13)));
344 break;
345 case HAL_MEMCARD_DATA_WIDTH_8_BIT:
346 SETR_32(SD_OPTION,
347 ((GETR_32(SD_OPTION) & ~(BIT15 | BIT13)) | BIT13));
348 break;
349 default:
350 goto EXIT;
351 }
352
353 /* CMD13 */
354 emmc_make_nontrans_cmd(CMD13_SEND_STATUS, EMMC_RCA << 16);
355 result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
356 if (result != EMMC_SUCCESS) {
357 goto EXIT;
358 }
359
360 /* CMD8 (EXT_CSD) */
361 emmc_make_trans_cmd(CMD8_SEND_EXT_CSD, 0x00000000,
362 (uint32_t *) (&mmc_drv_obj.ext_csd_data[0]),
363 EMMC_MAX_EXT_CSD_LENGTH, HAL_MEMCARD_READ,
364 HAL_MEMCARD_NOT_DMA);
365 result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
366 if (result != EMMC_SUCCESS) {
367 goto EXIT;
368 }
369
370 return EMMC_SUCCESS;
371
372EXIT:
373
374 emmc_write_error_info(EMMC_FUNCNO_BUS_WIDTH, result);
375 ERROR("BL2: emmc bus_width error end\n");
376 return result;
377}
378
379EMMC_ERROR_CODE emmc_select_partition(EMMC_PARTITION_ID id)
380{
381 EMMC_ERROR_CODE result;
382 uint32_t arg;
383 uint32_t partition_config;
384
385 /* state check */
386 if (mmc_drv_obj.mount != TRUE) {
387 emmc_write_error_info(EMMC_FUNCNO_NONE, EMMC_ERR_STATE);
388 return EMMC_ERR_STATE;
389 }
390
391 /* id = PARTITION_ACCESS(Bit[2:0]) */
392 if ((id & ~PARTITION_ID_MASK) != 0) {
393 emmc_write_error_info(EMMC_FUNCNO_NONE, EMMC_ERR_PARAM);
394 return EMMC_ERR_PARAM;
395 }
396
397 /* EXT_CSD[179] value */
398 partition_config =
399 (uint32_t) mmc_drv_obj.ext_csd_data[EMMC_EXT_CSD_PARTITION_CONFIG];
400 if ((partition_config & PARTITION_ID_MASK) == id) {
401 result = EMMC_SUCCESS;
402 } else {
403
404 partition_config =
405 (uint32_t) ((partition_config & ~PARTITION_ID_MASK) | id);
406 arg = EMMC_SWITCH_PARTITION_CONFIG | (partition_config << 8);
407
408 result = emmc_set_ext_csd(arg);
409 }
410
411 return result;
412}
413
414static void set_sd_clk(uint32_t clkDiv)
415{
416 uint32_t dataL;
417
418 dataL = (GETR_32(SD_CLK_CTRL) & (~SD_CLK_CTRL_CLKDIV_MASK));
419
420 switch (clkDiv) {
421 case 1:
422 dataL |= 0x000000FFU;
423 break; /* 1/1 */
424 case 2:
425 dataL |= 0x00000000U;
426 break; /* 1/2 */
427 case 4:
428 dataL |= 0x00000001U;
429 break; /* 1/4 */
430 case 8:
431 dataL |= 0x00000002U;
432 break; /* 1/8 */
433 case 16:
434 dataL |= 0x00000004U;
435 break; /* 1/16 */
436 case 32:
437 dataL |= 0x00000008U;
438 break; /* 1/32 */
439 case 64:
440 dataL |= 0x00000010U;
441 break; /* 1/64 */
442 case 128:
443 dataL |= 0x00000020U;
444 break; /* 1/128 */
445 case 256:
446 dataL |= 0x00000040U;
447 break; /* 1/256 */
448 case 512:
449 dataL |= 0x00000080U;
450 break; /* 1/512 */
451 }
452
453 SETR_32(SD_CLK_CTRL, dataL);
454 mmc_drv_obj.current_freq = (uint32_t) clkDiv;
455}
456
457static void emmc_get_partition_access(void)
458{
459 uint32_t reg;
460 EMMC_ERROR_CODE result;
461
462 reg = mmio_read_32(RCAR_PRR) & (RCAR_PRODUCT_MASK | RCAR_CUT_MASK);
463 if ((reg == RCAR_PRODUCT_H3_CUT20) || (reg == RCAR_PRODUCT_M3_CUT11)) {
464 SETR_32(SD_OPTION, 0x000060EEU); /* 8 bits width */
465 /* CMD8 (EXT_CSD) */
466 emmc_make_trans_cmd(CMD8_SEND_EXT_CSD, 0x00000000U,
467 (uint32_t *) (&mmc_drv_obj.ext_csd_data[0]),
468 EMMC_MAX_EXT_CSD_LENGTH,
469 HAL_MEMCARD_READ, HAL_MEMCARD_NOT_DMA);
470 mmc_drv_obj.get_partition_access_flag = TRUE;
471 result =
472 emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
473 mmc_drv_obj.get_partition_access_flag = FALSE;
474 if (result == EMMC_SUCCESS) {
475 mmc_drv_obj.partition_access =
476 (EMMC_PARTITION_ID) (mmc_drv_obj.ext_csd_data[179]
477 & PARTITION_ID_MASK);
478 } else if (result == EMMC_ERR_CMD_TIMEOUT) {
479 mmc_drv_obj.partition_access = PARTITION_ID_BOOT_1;
480 } else {
481 emmc_write_error_info(EMMC_FUNCNO_GET_PERTITION_ACCESS,
482 result);
483 panic();
484 }
485 SETR_32(SD_OPTION, 0x0000C0EEU); /* Initialize */
486 }
487}
488
489static uint32_t emmc_calc_tran_speed(uint32_t *freq)
490{
491 const uint32_t unit[8] = { 10000, 100000, 1000000, 10000000,
492 0, 0, 0, 0 }; /**< frequency unit (1/10) */
493 const uint32_t mult[16] = { 0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45,
494 52, 55, 60, 70, 80 };
495
496 uint32_t maxFreq;
497 uint32_t result;
498 uint32_t tran_speed = EMMC_CSD_TRAN_SPEED();
499
500 /* tran_speed = 0x32
501 * unit[tran_speed&0x7] = uint[0x2] = 1000000
502 * mult[(tran_speed&0x78)>>3] = mult[0x30>>3] = mult[6] = 26
503 * 1000000 * 26 = 26000000 (26MHz)
504 */
505
506 result = 1;
507 maxFreq =
508 unit[tran_speed & EMMC_TRANSPEED_FREQ_UNIT_MASK] *
509 mult[(tran_speed & EMMC_TRANSPEED_MULT_MASK) >>
510 EMMC_TRANSPEED_MULT_SHIFT];
511
512 if (maxFreq == 0) {
513 result = 0;
514 } else if (MMC_FREQ_52MHZ <= maxFreq)
515 *freq = MMC_52MHZ;
516 else if (MMC_FREQ_26MHZ <= maxFreq)
517 *freq = MMC_26MHZ;
518 else if (MMC_FREQ_20MHZ <= maxFreq)
519 *freq = MMC_20MHZ;
520 else
521 *freq = MMC_400KHZ;
522
523 return result;
524}
525
526static uint32_t emmc_set_timeout_register_value(uint32_t freq)
527{
528 uint32_t timeoutCnt; /* SD_OPTION - Timeout Counter */
529
530 switch (freq) {
531 case 1U:
532 timeoutCnt = 0xE0U;
533 break; /* SDCLK * 2^27 */
534 case 2U:
535 timeoutCnt = 0xE0U;
536 break; /* SDCLK * 2^27 */
537 case 4U:
538 timeoutCnt = 0xD0U;
539 break; /* SDCLK * 2^26 */
540 case 8U:
541 timeoutCnt = 0xC0U;
542 break; /* SDCLK * 2^25 */
543 case 16U:
544 timeoutCnt = 0xB0U;
545 break; /* SDCLK * 2^24 */
546 case 32U:
547 timeoutCnt = 0xA0U;
548 break; /* SDCLK * 2^23 */
549 case 64U:
550 timeoutCnt = 0x90U;
551 break; /* SDCLK * 2^22 */
552 case 128U:
553 timeoutCnt = 0x80U;
554 break; /* SDCLK * 2^21 */
555 case 256U:
556 timeoutCnt = 0x70U;
557 break; /* SDCLK * 2^20 */
558 case 512U:
559 timeoutCnt = 0x70U;
560 break; /* SDCLK * 2^20 */
561 default:
562 timeoutCnt = 0xE0U;
563 break; /* SDCLK * 2^27 */
564 }
565
566 return timeoutCnt;
567}
568
569EMMC_ERROR_CODE emmc_set_ext_csd(uint32_t arg)
570{
571 EMMC_ERROR_CODE result;
572
573 /* CMD6 */
574 emmc_make_nontrans_cmd(CMD6_SWITCH, arg);
575 result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
576 if (result != EMMC_SUCCESS) {
577 return result;
578 }
579
580 /* CMD13 */
581 emmc_make_nontrans_cmd(CMD13_SEND_STATUS, EMMC_RCA << 16);
582 result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
583 if (result != EMMC_SUCCESS) {
584 return result;
585 }
586
587 /* CMD8 (EXT_CSD) */
588 emmc_make_trans_cmd(CMD8_SEND_EXT_CSD, 0x00000000,
589 (uint32_t *) (&mmc_drv_obj.ext_csd_data[0]),
590 EMMC_MAX_EXT_CSD_LENGTH, HAL_MEMCARD_READ,
591 HAL_MEMCARD_NOT_DMA);
592 result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
593 if (result != EMMC_SUCCESS) {
594 return result;
595 }
596 return EMMC_SUCCESS;
597}
598
599EMMC_ERROR_CODE emmc_set_request_mmc_clock(uint32_t *freq)
600{
601 /* parameter check */
602 if (freq == NULL) {
603 emmc_write_error_info(EMMC_FUNCNO_SET_CLOCK, EMMC_ERR_PARAM);
604 return EMMC_ERR_PARAM;
605 }
606
607 /* state check */
608 if ((mmc_drv_obj.initialize != TRUE)
609 || (mmc_drv_obj.card_power_enable != TRUE)) {
610 emmc_write_error_info(EMMC_FUNCNO_SET_CLOCK, EMMC_ERR_STATE);
611 return EMMC_ERR_STATE;
612 }
613
614 /* clock is already running in the desired frequency. */
615 if ((mmc_drv_obj.clock_enable == TRUE)
616 && (mmc_drv_obj.current_freq == *freq)) {
617 return EMMC_SUCCESS;
618 }
619
620 /* busy check */
621 if ((GETR_32(SD_INFO2) & SD_INFO2_CBSY) != 0) {
622 emmc_write_error_info(EMMC_FUNCNO_SET_CLOCK,
623 EMMC_ERR_CARD_BUSY);
624 return EMMC_ERR;
625 }
626
627 set_sd_clk(*freq);
628 mmc_drv_obj.clock_enable = FALSE;
629
630 return emmc_clock_ctrl(TRUE); /* clock on */
631}
632
633EMMC_ERROR_CODE rcar_emmc_mount(void)
634{
635 EMMC_ERROR_CODE result;
636
637 /* state check */
638 if ((mmc_drv_obj.initialize != TRUE)
639 || (mmc_drv_obj.card_power_enable != TRUE)
640 || ((GETR_32(SD_INFO2) & SD_INFO2_CBSY) != 0)
641 ) {
642 emmc_write_error_info(EMMC_FUNCNO_MOUNT, EMMC_ERR_STATE);
643 return EMMC_ERR_STATE;
644 }
645
646 /* initialize card (IDLE state --> Transfer state) */
647 result = emmc_card_init();
648 if (result != EMMC_SUCCESS) {
649 emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
650 if (emmc_clock_ctrl(FALSE) != EMMC_SUCCESS) {
651 /* nothing to do. */
652 }
653 return result;
654 }
655
656 /* Switching high speed mode */
657 result = emmc_high_speed();
658 if (result != EMMC_SUCCESS) {
659 emmc_write_error_info_func_no(EMMC_FUNCNO_HIGH_SPEED);
660 if (emmc_clock_ctrl(FALSE) != EMMC_SUCCESS) {
661 /* nothing to do. */
662 }
663 return result;
664 }
665
666 /* Changing the data bus width */
667 result = emmc_bus_width(8);
668 if (result != EMMC_SUCCESS) {
669 emmc_write_error_info_func_no(EMMC_FUNCNO_BUS_WIDTH);
670 if (emmc_clock_ctrl(FALSE) != EMMC_SUCCESS) {
671 /* nothing to do. */
672 }
673 return result;
674 }
675
676 /* mount complete */
677 mmc_drv_obj.mount = TRUE;
678
679 return EMMC_SUCCESS;
680}