| Varun Wadekar | 9f4a7d3 | 2018-10-19 11:42:28 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. |
| Varun Wadekar | 2909fa3 | 2020-01-09 08:52:10 -0800 | [diff] [blame] | 3 | * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. |
| Varun Wadekar | 9f4a7d3 | 2018-10-19 11:42:28 -0700 | [diff] [blame] | 4 | * |
| 5 | * SPDX-License-Identifier: BSD-3-Clause |
| 6 | */ |
| 7 | |
| Varun Wadekar | 2909fa3 | 2020-01-09 08:52:10 -0800 | [diff] [blame] | 8 | #ifndef TEGRA_GIC_H |
| 9 | #define TEGRA_GIC_H |
| Varun Wadekar | 9f4a7d3 | 2018-10-19 11:42:28 -0700 | [diff] [blame] | 10 | |
| Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 11 | #include <common/interrupt_props.h> |
| Varun Wadekar | 9f4a7d3 | 2018-10-19 11:42:28 -0700 | [diff] [blame] | 12 | |
| 13 | /******************************************************************************* |
| 14 | * Per-CPU struct describing FIQ state to be stored |
| 15 | ******************************************************************************/ |
| 16 | typedef struct pcpu_fiq_state { |
| 17 | uint64_t elr_el3; |
| 18 | uint64_t spsr_el3; |
| 19 | } pcpu_fiq_state_t; |
| 20 | |
| 21 | /******************************************************************************* |
| Elyes Haouas | 2be03c0 | 2023-02-13 09:14:48 +0100 | [diff] [blame] | 22 | * Function declarations |
| Varun Wadekar | 9f4a7d3 | 2018-10-19 11:42:28 -0700 | [diff] [blame] | 23 | ******************************************************************************/ |
| 24 | void tegra_gic_cpuif_deactivate(void); |
| 25 | void tegra_gic_init(void); |
| 26 | void tegra_gic_pcpu_init(void); |
| 27 | void tegra_gic_setup(const interrupt_prop_t *interrupt_props, |
| 28 | unsigned int interrupt_props_num); |
| 29 | |
| Varun Wadekar | 2909fa3 | 2020-01-09 08:52:10 -0800 | [diff] [blame] | 30 | #endif /* TEGRA_GIC_H */ |