Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 1 | /* |
Govindraj Raja | 24d3a4e | 2023-12-21 13:57:49 -0600 | [diff] [blame] | 2 | * Copyright (c) 2019-2024, Arm Limited. All rights reserved. |
Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef ARCH_FEATURES_H |
| 8 | #define ARCH_FEATURES_H |
| 9 | |
| 10 | #include <stdbool.h> |
| 11 | |
| 12 | #include <arch_helpers.h> |
Andre Przywara | e8920f6 | 2022-11-10 14:28:01 +0000 | [diff] [blame] | 13 | #include <common/feat_detect.h> |
Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 14 | |
Andre Przywara | bb0db3b | 2023-01-25 12:26:14 +0000 | [diff] [blame] | 15 | #define ISOLATE_FIELD(reg, feat) \ |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 16 | ((unsigned int)(((reg) >> (feat)) & ID_REG_FIELD_MASK)) |
Andre Przywara | bb0db3b | 2023-01-25 12:26:14 +0000 | [diff] [blame] | 17 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 18 | #define CREATE_FEATURE_FUNCS_VER(name, read_func, idvalue, guard) \ |
| 19 | static inline bool is_ ## name ## _supported(void) \ |
| 20 | { \ |
| 21 | if ((guard) == FEAT_STATE_DISABLED) { \ |
| 22 | return false; \ |
| 23 | } \ |
| 24 | if ((guard) == FEAT_STATE_ALWAYS) { \ |
| 25 | return true; \ |
| 26 | } \ |
| 27 | return read_func() >= (idvalue); \ |
Antonio Nino Diaz | d29d21e | 2019-02-06 09:23:04 +0000 | [diff] [blame] | 28 | } |
| 29 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 30 | #define CREATE_FEATURE_FUNCS(name, idreg, idfield, guard) \ |
| 31 | static unsigned int read_ ## name ## _id_field(void) \ |
| 32 | { \ |
| 33 | return ISOLATE_FIELD(read_ ## idreg(), idfield); \ |
| 34 | } \ |
| 35 | CREATE_FEATURE_FUNCS_VER(name, read_ ## name ## _id_field, 1U, guard) |
Andre Przywara | 9727294 | 2023-01-26 15:27:38 +0000 | [diff] [blame] | 36 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 37 | static inline bool is_armv7_gentimer_present(void) |
Andre Przywara | 98908b3 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 38 | { |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 39 | /* The Generic Timer is always present in an ARMv8-A implementation */ |
| 40 | return true; |
Andre Przywara | 98908b3 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 41 | } |
| 42 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 43 | CREATE_FEATURE_FUNCS(feat_pan, id_aa64mmfr1_el1, ID_AA64MMFR1_EL1_PAN_SHIFT, |
| 44 | ENABLE_FEAT_PAN) |
| 45 | CREATE_FEATURE_FUNCS(feat_vhe, id_aa64mmfr1_el1, ID_AA64MMFR1_EL1_VHE_SHIFT, |
| 46 | ENABLE_FEAT_VHE) |
Daniel Boulby | 44b4333 | 2020-11-25 16:36:46 +0000 | [diff] [blame] | 47 | |
Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 48 | static inline bool is_armv8_2_ttcnp_present(void) |
| 49 | { |
| 50 | return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) & |
| 51 | ID_AA64MMFR2_EL1_CNP_MASK) != 0U; |
| 52 | } |
| 53 | |
Juan Pablo Conde | e089a17 | 2022-06-29 17:44:43 -0400 | [diff] [blame] | 54 | static inline bool is_feat_pacqarma3_present(void) |
| 55 | { |
| 56 | uint64_t mask_id_aa64isar2 = |
| 57 | (ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) | |
| 58 | (ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT); |
| 59 | |
| 60 | /* If any of the fields is not zero, QARMA3 algorithm is present */ |
| 61 | return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U; |
| 62 | } |
| 63 | |
Antonio Nino Diaz | 25cda67 | 2019-02-19 11:53:51 +0000 | [diff] [blame] | 64 | static inline bool is_armv8_3_pauth_present(void) |
| 65 | { |
Juan Pablo Conde | e089a17 | 2022-06-29 17:44:43 -0400 | [diff] [blame] | 66 | uint64_t mask_id_aa64isar1 = |
| 67 | (ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) | |
| 68 | (ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) | |
| 69 | (ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) | |
| 70 | (ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT); |
Antonio Nino Diaz | 25cda67 | 2019-02-19 11:53:51 +0000 | [diff] [blame] | 71 | |
Juan Pablo Conde | e089a17 | 2022-06-29 17:44:43 -0400 | [diff] [blame] | 72 | /* |
| 73 | * If any of the fields is not zero or QARMA3 is present, |
| 74 | * PAuth is present |
| 75 | */ |
| 76 | return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U || |
| 77 | is_feat_pacqarma3_present()); |
Antonio Nino Diaz | 25cda67 | 2019-02-19 11:53:51 +0000 | [diff] [blame] | 78 | } |
| 79 | |
Sathees Balya | 7415597 | 2019-01-25 11:36:01 +0000 | [diff] [blame] | 80 | static inline bool is_armv8_4_ttst_present(void) |
| 81 | { |
| 82 | return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) & |
| 83 | ID_AA64MMFR2_EL1_ST_MASK) == 1U; |
| 84 | } |
| 85 | |
Alexei Fedorov | 90f2e88 | 2019-05-24 12:17:09 +0100 | [diff] [blame] | 86 | static inline bool is_armv8_5_bti_present(void) |
| 87 | { |
| 88 | return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) & |
| 89 | ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED; |
| 90 | } |
| 91 | |
Govindraj Raja | 24d3a4e | 2023-12-21 13:57:49 -0600 | [diff] [blame] | 92 | CREATE_FEATURE_FUNCS(feat_mte, id_aa64pfr1_el1, ID_AA64PFR1_EL1_MTE_SHIFT, |
| 93 | ENABLE_FEAT_MTE) |
Govindraj Raja | d7b63ac | 2024-01-26 10:08:37 -0600 | [diff] [blame] | 94 | CREATE_FEATURE_FUNCS_VER(feat_mte2, read_feat_mte_id_field, MTE_IMPLEMENTED_ELX, |
| 95 | ENABLE_FEAT_MTE2) |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 96 | CREATE_FEATURE_FUNCS(feat_sel2, id_aa64pfr0_el1, ID_AA64PFR0_SEL2_SHIFT, |
| 97 | ENABLE_FEAT_SEL2) |
| 98 | CREATE_FEATURE_FUNCS(feat_twed, id_aa64mmfr1_el1, ID_AA64MMFR1_EL1_TWED_SHIFT, |
| 99 | ENABLE_FEAT_TWED) |
| 100 | CREATE_FEATURE_FUNCS(feat_fgt, id_aa64mmfr0_el1, ID_AA64MMFR0_EL1_FGT_SHIFT, |
| 101 | ENABLE_FEAT_FGT) |
| 102 | CREATE_FEATURE_FUNCS(feat_mte_perm, id_aa64pfr2_el1, |
| 103 | ID_AA64PFR2_EL1_MTEPERM_SHIFT, ENABLE_FEAT_MTE_PERM) |
| 104 | CREATE_FEATURE_FUNCS(feat_ecv, id_aa64mmfr0_el1, ID_AA64MMFR0_EL1_ECV_SHIFT, |
| 105 | ENABLE_FEAT_ECV) |
| 106 | CREATE_FEATURE_FUNCS_VER(feat_ecv_v2, read_feat_ecv_id_field, |
| 107 | ID_AA64MMFR0_EL1_ECV_SELF_SYNCH, ENABLE_FEAT_ECV) |
Mark Brown | c37eee7 | 2023-03-14 20:13:03 +0000 | [diff] [blame] | 108 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 109 | CREATE_FEATURE_FUNCS(feat_rng, id_aa64isar0_el1, ID_AA64ISAR0_RNDR_SHIFT, |
| 110 | ENABLE_FEAT_RNG) |
| 111 | CREATE_FEATURE_FUNCS(feat_tcr2, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_TCRX_SHIFT, |
| 112 | ENABLE_FEAT_TCR2) |
Mark Brown | 293a661 | 2023-03-14 20:48:43 +0000 | [diff] [blame] | 113 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 114 | CREATE_FEATURE_FUNCS(feat_s2poe, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_S2POE_SHIFT, |
| 115 | ENABLE_FEAT_S2POE) |
| 116 | CREATE_FEATURE_FUNCS(feat_s1poe, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_S1POE_SHIFT, |
| 117 | ENABLE_FEAT_S1POE) |
Mark Brown | 293a661 | 2023-03-14 20:48:43 +0000 | [diff] [blame] | 118 | static inline bool is_feat_sxpoe_supported(void) |
| 119 | { |
| 120 | return is_feat_s1poe_supported() || is_feat_s2poe_supported(); |
| 121 | } |
| 122 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 123 | CREATE_FEATURE_FUNCS(feat_s2pie, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_S2PIE_SHIFT, |
| 124 | ENABLE_FEAT_S2PIE) |
| 125 | CREATE_FEATURE_FUNCS(feat_s1pie, id_aa64mmfr3_el1, ID_AA64MMFR3_EL1_S1PIE_SHIFT, |
| 126 | ENABLE_FEAT_S1PIE) |
Mark Brown | 293a661 | 2023-03-14 20:48:43 +0000 | [diff] [blame] | 127 | static inline bool is_feat_sxpie_supported(void) |
| 128 | { |
| 129 | return is_feat_s1pie_supported() || is_feat_s2pie_supported(); |
| 130 | } |
| 131 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 132 | /* FEAT_GCS: Guarded Control Stack */ |
| 133 | CREATE_FEATURE_FUNCS(feat_gcs, id_aa64pfr1_el1, ID_AA64PFR1_EL1_GCS_SHIFT, |
| 134 | ENABLE_FEAT_GCS) |
Andre Przywara | 2c550e3 | 2022-11-10 14:41:07 +0000 | [diff] [blame] | 135 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 136 | /* FEAT_AMU: Activity Monitors Extension */ |
| 137 | CREATE_FEATURE_FUNCS(feat_amu, id_aa64pfr0_el1, ID_AA64PFR0_AMU_SHIFT, |
| 138 | ENABLE_FEAT_AMU) |
| 139 | CREATE_FEATURE_FUNCS_VER(feat_amuv1p1, read_feat_amu_id_field, |
| 140 | ID_AA64PFR0_AMU_V1P1, ENABLE_FEAT_AMUv1p1) |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 141 | |
Alexei Fedorov | 1993355 | 2020-05-26 13:16:41 +0100 | [diff] [blame] | 142 | /* |
| 143 | * Return MPAM version: |
| 144 | * |
| 145 | * 0x00: None Armv8.0 or later |
| 146 | * 0x01: v0.1 Armv8.4 or later |
| 147 | * 0x10: v1.0 Armv8.2 or later |
| 148 | * 0x11: v1.1 Armv8.4 or later |
| 149 | * |
| 150 | */ |
Andre Przywara | 84b8653 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 151 | static inline unsigned int read_feat_mpam_version(void) |
Alexei Fedorov | 1993355 | 2020-05-26 13:16:41 +0100 | [diff] [blame] | 152 | { |
| 153 | return (unsigned int)((((read_id_aa64pfr0_el1() >> |
| 154 | ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) | |
| 155 | ((read_id_aa64pfr1_el1() >> |
| 156 | ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK)); |
| 157 | } |
| 158 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 159 | CREATE_FEATURE_FUNCS_VER(feat_mpam, read_feat_mpam_version, 1U, |
Arvind Ram Prakash | ab28d4b | 2023-10-11 12:10:56 -0500 | [diff] [blame] | 160 | ENABLE_FEAT_MPAM) |
Andre Przywara | f20ad90 | 2022-11-15 11:45:19 +0000 | [diff] [blame] | 161 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 162 | /* FEAT_HCX: Extended Hypervisor Configuration Register */ |
| 163 | CREATE_FEATURE_FUNCS(feat_hcx, id_aa64mmfr1_el1, ID_AA64MMFR1_EL1_HCX_SHIFT, |
| 164 | ENABLE_FEAT_HCX) |
johpow01 | f91e59f | 2021-08-04 19:38:18 -0500 | [diff] [blame] | 165 | |
Juan Pablo Conde | 42305f2 | 2022-07-12 16:40:29 -0400 | [diff] [blame] | 166 | static inline bool is_feat_rng_trap_present(void) |
| 167 | { |
| 168 | return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) & |
| 169 | ID_AA64PFR1_EL1_RNDR_TRAP_MASK) |
| 170 | == ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED); |
| 171 | } |
| 172 | |
Zelalem Aweke | 79e3d29 | 2021-07-08 16:51:14 -0500 | [diff] [blame] | 173 | static inline unsigned int get_armv9_2_feat_rme_support(void) |
| 174 | { |
| 175 | /* |
| 176 | * Return the RME version, zero if not supported. This function can be |
| 177 | * used as both an integer value for the RME version or compared to zero |
| 178 | * to detect RME presence. |
| 179 | */ |
| 180 | return (unsigned int)(read_id_aa64pfr0_el1() >> |
| 181 | ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK; |
| 182 | } |
| 183 | |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 184 | /********************************************************************************* |
| 185 | * Function to identify the presence of FEAT_SB (Speculation Barrier Instruction) |
| 186 | ********************************************************************************/ |
Andre Przywara | 46880dc | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 187 | static inline unsigned int read_feat_sb_id_field(void) |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 188 | { |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 189 | return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_SB_SHIFT); |
Andre Przywara | 06ea44e | 2022-11-17 17:30:43 +0000 | [diff] [blame] | 190 | } |
| 191 | |
Sona Mathew | 3b84c96 | 2023-10-25 16:48:19 -0500 | [diff] [blame] | 192 | /* |
| 193 | * FEAT_CSV2: Cache Speculation Variant 2. This checks bit fields[56-59] |
| 194 | * of id_aa64pfr0_el1 register and can be used to check for below features: |
| 195 | * FEAT_CSV2_2: Cache Speculation Variant CSV2_2. |
| 196 | * FEAT_CSV2_3: Cache Speculation Variant CSV2_3. |
| 197 | * 0b0000 - Feature FEAT_CSV2 is not implemented. |
| 198 | * 0b0001 - Feature FEAT_CSV2 is implemented, but FEAT_CSV2_2 and FEAT_CSV2_3 |
| 199 | * are not implemented. |
| 200 | * 0b0010 - Feature FEAT_CSV2_2 is implemented but FEAT_CSV2_3 is not |
| 201 | * implemented. |
| 202 | * 0b0011 - Feature FEAT_CSV2_3 is implemented. |
| 203 | */ |
| 204 | static inline unsigned int read_feat_csv2_id_field(void) |
| 205 | { |
| 206 | return (unsigned int)(read_id_aa64pfr0_el1() >> |
| 207 | ID_AA64PFR0_CSV2_SHIFT) & ID_AA64PFR0_CSV2_MASK; |
| 208 | } |
| 209 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 210 | CREATE_FEATURE_FUNCS_VER(feat_csv2_2, read_feat_csv2_id_field, |
| 211 | ID_AA64PFR0_CSV2_2_SUPPORTED, ENABLE_FEAT_CSV2_2) |
Sona Mathew | 3b84c96 | 2023-10-25 16:48:19 -0500 | [diff] [blame] | 212 | CREATE_FEATURE_FUNCS_VER(feat_csv2_3, read_feat_csv2_id_field, |
| 213 | ID_AA64PFR0_CSV2_3_SUPPORTED, ENABLE_FEAT_CSV2_3) |
Andre Przywara | 06ea44e | 2022-11-17 17:30:43 +0000 | [diff] [blame] | 214 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 215 | /* FEAT_SPE: Statistical Profiling Extension */ |
| 216 | CREATE_FEATURE_FUNCS(feat_spe, id_aa64dfr0_el1, ID_AA64DFR0_PMS_SHIFT, |
| 217 | ENABLE_SPE_FOR_NS) |
Andre Przywara | 06ea44e | 2022-11-17 17:30:43 +0000 | [diff] [blame] | 218 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 219 | /* FEAT_SVE: Scalable Vector Extension */ |
| 220 | CREATE_FEATURE_FUNCS(feat_sve, id_aa64pfr0_el1, ID_AA64PFR0_SVE_SHIFT, |
| 221 | ENABLE_SVE_FOR_NS) |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 222 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 223 | /* FEAT_RAS: Reliability, Accessibility, Serviceability */ |
| 224 | CREATE_FEATURE_FUNCS(feat_ras, id_aa64pfr0_el1, |
| 225 | ID_AA64PFR0_RAS_SHIFT, ENABLE_FEAT_RAS) |
Andre Przywara | edc449d | 2023-01-27 14:09:20 +0000 | [diff] [blame] | 226 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 227 | /* FEAT_DIT: Data Independent Timing instructions */ |
| 228 | CREATE_FEATURE_FUNCS(feat_dit, id_aa64pfr0_el1, |
| 229 | ID_AA64PFR0_DIT_SHIFT, ENABLE_FEAT_DIT) |
Andre Przywara | edc449d | 2023-01-27 14:09:20 +0000 | [diff] [blame] | 230 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 231 | CREATE_FEATURE_FUNCS(feat_sys_reg_trace, id_aa64dfr0_el1, |
| 232 | ID_AA64DFR0_TRACEVER_SHIFT, ENABLE_SYS_REG_TRACE_FOR_NS) |
Andre Przywara | edc449d | 2023-01-27 14:09:20 +0000 | [diff] [blame] | 233 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 234 | /* FEAT_TRF: TraceFilter */ |
| 235 | CREATE_FEATURE_FUNCS(feat_trf, id_aa64dfr0_el1, ID_AA64DFR0_TRACEFILT_SHIFT, |
| 236 | ENABLE_TRF_FOR_NS) |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 237 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 238 | /* FEAT_NV2: Enhanced Nested Virtualization */ |
| 239 | CREATE_FEATURE_FUNCS(feat_nv, id_aa64mmfr2_el1, ID_AA64MMFR2_EL1_NV_SHIFT, 0) |
| 240 | CREATE_FEATURE_FUNCS_VER(feat_nv2, read_feat_nv_id_field, |
| 241 | ID_AA64MMFR2_EL1_NV2_SUPPORTED, CTX_INCLUDE_NEVE_REGS) |
Andre Przywara | c97c551 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 242 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 243 | /* FEAT_BRBE: Branch Record Buffer Extension */ |
| 244 | CREATE_FEATURE_FUNCS(feat_brbe, id_aa64dfr0_el1, ID_AA64DFR0_BRBE_SHIFT, |
| 245 | ENABLE_BRBE_FOR_NS) |
Andre Przywara | c97c551 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 246 | |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 247 | /* FEAT_TRBE: Trace Buffer Extension */ |
| 248 | CREATE_FEATURE_FUNCS(feat_trbe, id_aa64dfr0_el1, ID_AA64DFR0_TRACEBUFFER_SHIFT, |
| 249 | ENABLE_TRBE_FOR_NS) |
Andre Przywara | c97c551 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 250 | |
Jayanth Dodderi Chidanand | 605419a | 2023-03-06 23:56:14 +0000 | [diff] [blame] | 251 | static inline unsigned int read_feat_sme_fa64_id_field(void) |
| 252 | { |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 253 | return ISOLATE_FIELD(read_id_aa64smfr0_el1(), |
| 254 | ID_AA64SMFR0_EL1_SME_FA64_SHIFT); |
Jayanth Dodderi Chidanand | 605419a | 2023-03-06 23:56:14 +0000 | [diff] [blame] | 255 | } |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 256 | /* FEAT_SMEx: Scalar Matrix Extension */ |
| 257 | CREATE_FEATURE_FUNCS(feat_sme, id_aa64pfr1_el1, ID_AA64PFR1_EL1_SME_SHIFT, |
| 258 | ENABLE_SME_FOR_NS) |
| 259 | CREATE_FEATURE_FUNCS_VER(feat_sme2, read_feat_sme_id_field, |
| 260 | ID_AA64PFR1_EL1_SME2_SUPPORTED, ENABLE_SME2_FOR_NS) |
Jayanth Dodderi Chidanand | cfe053a | 2022-11-08 10:31:07 +0000 | [diff] [blame] | 261 | |
Javier Almansa Sobrino | 8c8107e | 2023-05-03 12:16:11 +0100 | [diff] [blame] | 262 | /******************************************************************************* |
| 263 | * Function to get hardware granularity support |
| 264 | ******************************************************************************/ |
| 265 | |
| 266 | static inline unsigned int read_id_aa64mmfr0_el0_tgran4_field(void) |
| 267 | { |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 268 | return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), |
| 269 | ID_AA64MMFR0_EL1_TGRAN4_SHIFT); |
Javier Almansa Sobrino | 8c8107e | 2023-05-03 12:16:11 +0100 | [diff] [blame] | 270 | } |
| 271 | |
| 272 | static inline unsigned int read_id_aa64mmfr0_el0_tgran16_field(void) |
| 273 | { |
| 274 | return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 275 | ID_AA64MMFR0_EL1_TGRAN16_SHIFT); |
Javier Almansa Sobrino | 8c8107e | 2023-05-03 12:16:11 +0100 | [diff] [blame] | 276 | } |
| 277 | |
| 278 | static inline unsigned int read_id_aa64mmfr0_el0_tgran64_field(void) |
| 279 | { |
| 280 | return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 281 | ID_AA64MMFR0_EL1_TGRAN64_SHIFT); |
Javier Almansa Sobrino | 8c8107e | 2023-05-03 12:16:11 +0100 | [diff] [blame] | 282 | } |
| 283 | |
Boyan Karatotev | 05504ba | 2023-02-15 13:21:50 +0000 | [diff] [blame] | 284 | static inline unsigned int read_feat_pmuv3_id_field(void) |
| 285 | { |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 286 | return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMUVER_SHIFT); |
Boyan Karatotev | 05504ba | 2023-02-15 13:21:50 +0000 | [diff] [blame] | 287 | } |
| 288 | |
Boyan Karatotev | 677ed8a | 2023-02-16 09:45:29 +0000 | [diff] [blame] | 289 | static inline unsigned int read_feat_mtpmu_id_field(void) |
| 290 | { |
Andre Przywara | 0dda424 | 2023-04-18 16:58:36 +0100 | [diff] [blame] | 291 | return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_MTPMU_SHIFT); |
Boyan Karatotev | 677ed8a | 2023-02-16 09:45:29 +0000 | [diff] [blame] | 292 | } |
| 293 | |
| 294 | static inline bool is_feat_mtpmu_supported(void) |
| 295 | { |
| 296 | if (DISABLE_MTPMU == FEAT_STATE_DISABLED) { |
| 297 | return false; |
| 298 | } |
| 299 | |
| 300 | if (DISABLE_MTPMU == FEAT_STATE_ALWAYS) { |
| 301 | return true; |
| 302 | } |
| 303 | |
| 304 | unsigned int mtpmu = read_feat_mtpmu_id_field(); |
| 305 | |
| 306 | return (mtpmu != 0U) && (mtpmu != ID_AA64DFR0_MTPMU_DISABLED); |
| 307 | } |
| 308 | |
Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 309 | #endif /* ARCH_FEATURES_H */ |