blob: 05adbd07c1e175e06857f8bc8b0e1674942fae04 [file] [log] [blame]
Antonio Nino Diaz493bf332016-12-14 14:31:32 +00001#
Venkatesh Yadav Abbarapu34fbf1f2020-11-27 04:45:01 -07002# Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
Jeremie Corbier9e1873f2021-09-07 11:49:58 +02003# Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved.
Soren Brinkmann76fcae32016-03-06 20:16:27 -08004#
dp-armfa3cf0b2017-05-03 09:38:09 +01005# SPDX-License-Identifier: BSD-3-Clause
Soren Brinkmann76fcae32016-03-06 20:16:27 -08006
Soren Brinkmannba8309d2017-04-06 11:44:27 -07007override ERRATA_A53_855873 := 1
Masahiro Yamada8cf895c2016-12-19 17:41:47 +09008override PROGRAMMABLE_RESET_ADDRESS := 1
Soren Brinkmann76fcae32016-03-06 20:16:27 -08009PSCI_EXTENDED_STATE_ID := 1
10A53_DISABLE_NON_TEMPORAL_HINT := 0
Soren Brinkmann6d1ba582016-07-08 14:45:14 -070011SEPARATE_CODE_AND_RODATA := 1
Siva Durga Prasad Paladuguefd431b2018-04-30 20:12:12 +053012ZYNQMP_WDT_RESTART := 0
Venkatesh Yadav Abbarapubfa2a2a2021-02-19 01:40:14 -070013IPI_CRC_CHECK := 0
Masahiro Yamada8cf895c2016-12-19 17:41:47 +090014override RESET_TO_BL31 := 1
Siva Durga Prasad Paladugu60bfbc92018-09-24 22:51:49 -070015override WARMBOOT_ENABLE_DCACHE_EARLY := 1
Soren Brinkmann76fcae32016-03-06 20:16:27 -080016
Jan Kiszkae1407fc2020-07-14 22:36:59 +020017EL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT)
18
Jeremie Corbier9e1873f2021-09-07 11:49:58 +020019# pncd SPD requires secure SGI to be handled at EL1
20ifeq (${SPD},pncd)
21ifeq (${ZYNQMP_WDT_RESTART},1)
22$(error "Error: ZYNQMP_WDT_RESTART and SPD=pncd are incompatible")
23endif
24override GICV2_G0_FOR_EL3 := 0
25else
26override GICV2_G0_FOR_EL3 := 1
27endif
28
David Cunadoc5b0c0f2017-10-31 23:19:21 +000029# Do not enable SVE
30ENABLE_SVE_FOR_NS := 0
31
Dimitris Papastamos8e5bd5e2018-01-24 16:41:14 +000032WORKAROUND_CVE_2017_5715 := 0
33
Venkatesh Yadav Abbarapud90e47b2022-07-28 08:50:30 +053034ARM_XLAT_TABLES_LIB_V1 := 1
Venkatesh Yadav Abbarapu6d7f1e82022-05-06 14:07:15 +053035$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
36$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
37
Soren Brinkmann4a9ca042016-04-14 10:27:00 -070038ifdef ZYNQMP_ATF_MEM_BASE
39 $(eval $(call add_define,ZYNQMP_ATF_MEM_BASE))
40
41 ifndef ZYNQMP_ATF_MEM_SIZE
42 $(error "ZYNQMP_ATF_BASE defined without ZYNQMP_ATF_SIZE")
43 endif
44 $(eval $(call add_define,ZYNQMP_ATF_MEM_SIZE))
Soren Brinkmann76fcae32016-03-06 20:16:27 -080045
Soren Brinkmann4a9ca042016-04-14 10:27:00 -070046 ifdef ZYNQMP_ATF_MEM_PROGBITS_SIZE
47 $(eval $(call add_define,ZYNQMP_ATF_MEM_PROGBITS_SIZE))
48 endif
Soren Brinkmann76fcae32016-03-06 20:16:27 -080049endif
50
Soren Brinkmann4a9ca042016-04-14 10:27:00 -070051ifdef ZYNQMP_BL32_MEM_BASE
52 $(eval $(call add_define,ZYNQMP_BL32_MEM_BASE))
53
54 ifndef ZYNQMP_BL32_MEM_SIZE
55 $(error "ZYNQMP_BL32_BASE defined without ZYNQMP_BL32_SIZE")
56 endif
57 $(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE))
58endif
Soren Brinkmann76fcae32016-03-06 20:16:27 -080059
Soren Brinkmann99c0d7b2016-06-10 09:57:14 -070060
Siva Durga Prasad Paladuguefd431b2018-04-30 20:12:12 +053061ifdef ZYNQMP_WDT_RESTART
Michal Simek08341b72022-03-09 08:53:20 +010062 $(eval $(call add_define,ZYNQMP_WDT_RESTART))
Siva Durga Prasad Paladuguefd431b2018-04-30 20:12:12 +053063endif
64
Venkatesh Yadav Abbarapu35a8be92019-04-04 14:23:32 +053065ifdef ZYNQMP_IPI_CRC_CHECK
Michal Simek08341b72022-03-09 08:53:20 +010066 $(warning "ZYNQMP_IPI_CRC_CHECK macro is deprecated...instead please use IPI_CRC_CHECK.")
Venkatesh Yadav Abbarapubfa2a2a2021-02-19 01:40:14 -070067endif
68
69ifdef IPI_CRC_CHECK
70 $(eval $(call add_define,IPI_CRC_CHECK))
Venkatesh Yadav Abbarapu35a8be92019-04-04 14:23:32 +053071endif
72
Vesa Jääskeläinen28f9ce52022-04-29 08:47:24 +030073ifdef ZYNQMP_SECURE_EFUSES
74 $(eval $(call add_define,ZYNQMP_SECURE_EFUSES))
75endif
76
Venkatesh Yadav Abbarapu35a8be92019-04-04 14:23:32 +053077PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
78 -Iinclude/plat/arm/common/aarch64/ \
Jolly Shahb07fd0c2019-01-08 11:25:28 -080079 -Iplat/xilinx/common/include/ \
Wendy Liangc31c48b2019-01-21 13:45:48 +053080 -Iplat/xilinx/common/ipi_mailbox_service/ \
Soren Brinkmann76fcae32016-03-06 20:16:27 -080081 -Iplat/xilinx/zynqmp/include/ \
Wendy Liangf8fec362017-09-06 09:39:55 -070082 -Iplat/xilinx/zynqmp/pm_service/ \
Soren Brinkmann76fcae32016-03-06 20:16:27 -080083
Michal Simek53865b02021-05-27 09:42:37 +020084include lib/libfdt/libfdt.mk
Venkatesh Yadav Abbarapu1ad5f662020-12-03 20:27:18 -070085# Include GICv2 driver files
86include drivers/arm/gic/v2/gicv2.mk
87
Soby Mathewcc037c12016-04-08 16:42:58 +010088PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
89 lib/xlat_tables/aarch64/xlat_tables.c \
Venkatesh Yadav Abbarapu34fbf1f2020-11-27 04:45:01 -070090 drivers/arm/dcc/dcc_console.c \
Soren Brinkmanne5bdcaa2016-06-22 09:02:56 -070091 drivers/delay_timer/delay_timer.c \
92 drivers/delay_timer/generic_delay_timer.c \
Venkatesh Yadav Abbarapu1ad5f662020-12-03 20:27:18 -070093 ${GICV2_SOURCES} \
Soby Mathew17231132016-08-08 12:33:06 +010094 drivers/cadence/uart/aarch64/cdns_console.S \
Soren Brinkmann76fcae32016-03-06 20:16:27 -080095 plat/arm/common/arm_cci.c \
Soby Mathew0eb965b2016-07-07 08:45:56 +010096 plat/arm/common/arm_common.c \
Soren Brinkmann76fcae32016-03-06 20:16:27 -080097 plat/arm/common/arm_gicv2.c \
98 plat/common/plat_gicv2.c \
Jolly Shahc2583ab2019-01-08 11:31:49 -080099 plat/xilinx/common/ipi.c \
Venkatesh Yadav Abbarapu44e563a2021-01-23 22:16:47 -0700100 plat/xilinx/zynqmp/zynqmp_ipi.c \
101 plat/common/aarch64/crash_console_helpers.S \
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800102 plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S \
103 plat/xilinx/zynqmp/aarch64/zynqmp_common.c
104
Venkatesh Yadav Abbarapu34fbf1f2020-11-27 04:45:01 -0700105ZYNQMP_CONSOLE ?= cadence
106ifeq (${ZYNQMP_CONSOLE}, $(filter ${ZYNQMP_CONSOLE},cadence cadence0 cadence1 dcc))
107else
108 $(error "Please define ZYNQMP_CONSOLE")
109endif
110$(eval $(call add_define_val,ZYNQMP_CONSOLE,ZYNQMP_CONSOLE_ID_${ZYNQMP_CONSOLE}))
111
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800112BL31_SOURCES += drivers/arm/cci/cci.c \
113 lib/cpus/aarch64/aem_generic.S \
114 lib/cpus/aarch64/cortex_a53.S \
Soby Mathewf6c41082016-05-03 12:31:18 +0100115 plat/common/plat_psci_common.c \
Michal Simek53865b02021-05-27 09:42:37 +0200116 common/fdt_fixup.c \
117 ${LIBFDT_SRCS} \
Wendy Liangc31c48b2019-01-21 13:45:48 +0530118 plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
Jolly Shah259afe52019-01-09 12:37:57 -0800119 plat/xilinx/common/pm_service/pm_ipi.c \
Venkatesh Yadav Abbarapu1463dd52020-01-07 03:25:16 -0700120 plat/xilinx/common/plat_startup.c \
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800121 plat/xilinx/zynqmp/bl31_zynqmp_setup.c \
122 plat/xilinx/zynqmp/plat_psci.c \
123 plat/xilinx/zynqmp/plat_zynqmp.c \
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800124 plat/xilinx/zynqmp/plat_topology.c \
125 plat/xilinx/zynqmp/sip_svc_setup.c \
126 plat/xilinx/zynqmp/pm_service/pm_svc_main.c \
127 plat/xilinx/zynqmp/pm_service/pm_api_sys.c \
Rajan Vaja0ac2be12018-01-17 02:39:21 -0800128 plat/xilinx/zynqmp/pm_service/pm_api_pinctrl.c \
Rajan Vaja5529a012018-01-17 02:39:23 -0800129 plat/xilinx/zynqmp/pm_service/pm_api_ioctl.c \
Rajan Vaja35116132018-01-17 02:39:25 -0800130 plat/xilinx/zynqmp/pm_service/pm_api_clock.c \
Wendy Liangc31c48b2019-01-21 13:45:48 +0530131 plat/xilinx/zynqmp/pm_service/pm_client.c
132
Jan Kiszkae1407fc2020-07-14 22:36:59 +0200133ifeq (${SDEI_SUPPORT},1)
134BL31_SOURCES += plat/xilinx/zynqmp/zynqmp_ehf.c \
135 plat/xilinx/zynqmp/zynqmp_sdei.c
136endif
137
Venkatesh Yadav Abbarapu2dfbba42020-07-13 21:18:01 -0600138BL31_CPPFLAGS += -fno-jump-tables
Venkatesh Yadav Abbarapuf9d518a2021-12-06 21:28:34 -0700139TF_CFLAGS_aarch64 += -mbranch-protection=none
Venkatesh Yadav Abbarapu2dfbba42020-07-13 21:18:01 -0600140
Wendy Liangc31c48b2019-01-21 13:45:48 +0530141ifneq (${RESET_TO_BL31},1)
142 $(error "Using BL31 as the reset vector is only one option supported on ZynqMP. Please set RESET_TO_BL31 to 1.")
143endif