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Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05301/*
Michal Simek2a47faa2023-04-14 08:43:51 +02002 * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05303 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05307#include <asm_macros.S>
Prasad Kummari536e1102023-06-22 10:50:02 +05308
9#include <arch.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <drivers/arm/gicv3.h>
Prasad Kummari536e1102023-06-22 10:50:02 +053011
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053012#include <platform_def.h>
13
14 .globl plat_secondary_cold_boot_setup
15 .globl plat_is_my_cpu_primary
16 .globl versal_calc_core_pos
17 .globl platform_mem_init
18 .globl plat_my_core_pos
19
20 /* -----------------------------------------------------
21 * void plat_secondary_cold_boot_setup (void);
22 *
23 * This function performs any platform specific actions
24 * needed for a secondary cpu after a cold reset e.g
25 * mark the cpu's presence, mechanism to place it in a
26 * holding pen etc.
27 * TODO: Should we read the PSYS register to make sure
28 * that the request has gone through.
29 * -----------------------------------------------------
30 */
31func plat_secondary_cold_boot_setup
32 mrs x0, mpidr_el1
33
34 /*
35 * There is no sane reason to come out of this wfi. This
36 * cpu will be powered on and reset by the cpu_on pm api
37 */
38 dsb sy
39 bl plat_panic_handler
40endfunc plat_secondary_cold_boot_setup
41
42func plat_is_my_cpu_primary
43 mov x9, x30
44 bl plat_my_core_pos
45 cmp x0, #VERSAL_PRIMARY_CPU
46 cset x0, eq
47 ret x9
48endfunc plat_is_my_cpu_primary
49
50 /* -----------------------------------------------------
51 * unsigned int plat_my_core_pos(void)
52 * This function uses the versal_calc_core_pos()
53 * definition to get the index of the calling CPU.
54 * -----------------------------------------------------
55 */
56func plat_my_core_pos
57 mrs x0, mpidr_el1
58 b versal_calc_core_pos
59endfunc plat_my_core_pos
60
61func versal_calc_core_pos
62 and x1, x0, #MPIDR_CPU_MASK
63 and x0, x0, #MPIDR_CLUSTER_MASK
64 add x0, x1, x0, LSR #6
65 ret
66endfunc versal_calc_core_pos
67
68 /* ---------------------------------------------------------------------
69 * We don't need to carry out any memory initialization on VERSAL
70 * platform. The Secure RAM is accessible straight away.
71 * ---------------------------------------------------------------------
72 */
73func platform_mem_init
74 ret
75endfunc platform_mem_init