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Haojian Zhuang602362d2017-06-01 12:15:14 +08001#
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -06002# Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved.
Haojian Zhuang602362d2017-06-01 12:15:14 +08003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Haojian Zhuang1b4b4122018-01-25 16:13:05 +08007# Non-TF Boot ROM
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -06008RESET_TO_BL2 := 1
Haojian Zhuang1b4b4122018-01-25 16:13:05 +08009
Victor Chong91287682017-05-28 00:14:37 +090010# On Hikey960, the TSP can execute from TZC secure area in DRAM.
Victor Chong4d64c2b2018-02-01 00:37:49 +090011HIKEY960_TSP_RAM_LOCATION ?= dram
Victor Chong91287682017-05-28 00:14:37 +090012ifeq (${HIKEY960_TSP_RAM_LOCATION}, dram)
13 HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_DRAM_ID
14else ifeq (${HIKEY960_TSP_RAM_LOCATION}, sram)
Victor Chong4d64c2b2018-02-01 00:37:49 +090015 HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_SRAM_ID
Victor Chong91287682017-05-28 00:14:37 +090016else
17 $(error "Currently unsupported HIKEY960_TSP_RAM_LOCATION value")
18endif
19
Haojian Zhuang602362d2017-06-01 12:15:14 +080020CRASH_CONSOLE_BASE := PL011_UART6_BASE
21COLD_BOOT_SINGLE_CPU := 1
Leo Yan3886dc62020-03-02 22:15:08 +080022PLAT_PL061_MAX_GPIOS := 232
Haojian Zhuang602362d2017-06-01 12:15:14 +080023PROGRAMMABLE_RESET_ADDRESS := 1
David Cunadoc5b0c0f2017-10-31 23:19:21 +000024ENABLE_SVE_FOR_NS := 0
Haojian Zhuang32052ab2019-09-14 18:43:51 +080025PLAT_PARTITION_BLOCK_SIZE := 4096
Haojian Zhuang602362d2017-06-01 12:15:14 +080026
27# Process flags
Victor Chong91287682017-05-28 00:14:37 +090028$(eval $(call add_define,HIKEY960_TSP_RAM_LOCATION_ID))
Haojian Zhuang602362d2017-06-01 12:15:14 +080029$(eval $(call add_define,CRASH_CONSOLE_BASE))
Kaihua Zhong39ff2ee2018-07-16 17:33:48 +080030$(eval $(call add_define,PLAT_PL061_MAX_GPIOS))
Haojian Zhuang32052ab2019-09-14 18:43:51 +080031$(eval $(call add_define,PLAT_PARTITION_BLOCK_SIZE))
Haojian Zhuang602362d2017-06-01 12:15:14 +080032
Victor Chong7d787f52017-08-16 13:53:56 +090033# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
34# in the FIP if the platform requires.
35ifneq ($(BL32_EXTRA1),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +090036$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
Victor Chong7d787f52017-08-16 13:53:56 +090037endif
38ifneq ($(BL32_EXTRA2),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +090039$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
Victor Chong7d787f52017-08-16 13:53:56 +090040endif
41
Haojian Zhuang602362d2017-06-01 12:15:14 +080042USE_COHERENT_MEM := 1
43
Antonio Nino Diaz50a4d1a2019-02-01 12:22:22 +000044PLAT_INCLUDES := -Iplat/hisilicon/hikey960/include
Haojian Zhuang602362d2017-06-01 12:15:14 +080045
Antonio Nino Diaz582c2d72018-09-24 17:23:47 +010046PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/aarch64/pl011_console.S \
Haojian Zhuang602362d2017-06-01 12:15:14 +080047 drivers/delay_timer/delay_timer.c \
48 drivers/delay_timer/generic_delay_timer.c \
Haojian Zhuang602362d2017-06-01 12:15:14 +080049 plat/hisilicon/hikey960/aarch64/hikey960_common.c \
50 plat/hisilicon/hikey960/hikey960_boardid.c
51
Lukas Haneled62e842021-04-23 18:45:57 +020052include lib/xlat_tables_v2/xlat_tables.mk
53PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
54
Haojian Zhuang602362d2017-06-01 12:15:14 +080055HIKEY960_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
56 drivers/arm/gic/v2/gicv2_main.c \
57 drivers/arm/gic/v2/gicv2_helpers.c \
58 plat/common/plat_gicv2.c
59
60BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \
Kaihua Zhong39ff2ee2018-07-16 17:33:48 +080061 drivers/arm/pl061/pl061_gpio.c \
62 drivers/gpio/gpio.c \
Haojian Zhuang602362d2017-06-01 12:15:14 +080063 drivers/io/io_block.c \
64 drivers/io/io_fip.c \
65 drivers/io/io_storage.c \
66 drivers/synopsys/ufs/dw_ufs.c \
67 drivers/ufs/ufs.c \
68 lib/cpus/aarch64/cortex_a53.S \
69 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \
Haojian Zhuangd82e29d2018-03-05 13:20:33 +080070 plat/hisilicon/hikey960/hikey960_bl1_setup.c \
71 plat/hisilicon/hikey960/hikey960_bl_common.c \
Haojian Zhuang602362d2017-06-01 12:15:14 +080072 plat/hisilicon/hikey960/hikey960_io_storage.c \
73 ${HIKEY960_GIC_SOURCES}
Haojian Zhuang1f73c0c2017-06-01 14:03:22 +080074
Haojian Zhuanga94d75d2018-01-29 12:45:28 +080075BL2_SOURCES += common/desc_image_load.c \
Kaihua Zhong39ff2ee2018-07-16 17:33:48 +080076 drivers/arm/pl061/pl061_gpio.c \
77 drivers/gpio/gpio.c \
Haojian Zhuanga94d75d2018-01-29 12:45:28 +080078 drivers/io/io_block.c \
Haojian Zhuang1f73c0c2017-06-01 14:03:22 +080079 drivers/io/io_fip.c \
80 drivers/io/io_storage.c \
Haojian Zhuang32052ab2019-09-14 18:43:51 +080081 drivers/partition/gpt.c \
82 drivers/partition/partition.c \
Haojian Zhuang1b4b4122018-01-25 16:13:05 +080083 drivers/synopsys/ufs/dw_ufs.c \
Haojian Zhuang1f73c0c2017-06-01 14:03:22 +080084 drivers/ufs/ufs.c \
Haojian Zhuang1b4b4122018-01-25 16:13:05 +080085 lib/cpus/aarch64/cortex_a53.S \
86 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \
Haojian Zhuanga94d75d2018-01-29 12:45:28 +080087 plat/hisilicon/hikey960/hikey960_bl2_mem_params_desc.c \
Haojian Zhuang1f73c0c2017-06-01 14:03:22 +080088 plat/hisilicon/hikey960/hikey960_bl2_setup.c \
Haojian Zhuangd82e29d2018-03-05 13:20:33 +080089 plat/hisilicon/hikey960/hikey960_bl_common.c \
Haojian Zhuanga94d75d2018-01-29 12:45:28 +080090 plat/hisilicon/hikey960/hikey960_image_load.c \
Haojian Zhuang1f73c0c2017-06-01 14:03:22 +080091 plat/hisilicon/hikey960/hikey960_io_storage.c \
92 plat/hisilicon/hikey960/hikey960_mcu_load.c
Haojian Zhuang1b5c2252017-06-01 15:20:46 +080093
Victor Chong7d787f52017-08-16 13:53:56 +090094ifeq (${SPD},opteed)
95BL2_SOURCES += lib/optee/optee_utils.c
96endif
Victor Chong2d9a42d2017-08-17 15:21:10 +090097
Rohit Nerb9bed282022-05-11 03:06:07 -070098include lib/zlib/zlib.mk
99PLAT_INCLUDES += -Ilib/zlib
100BL2_SOURCES += $(ZLIB_SOURCES)
101
Haojian Zhuang1b5c2252017-06-01 15:20:46 +0800102BL31_SOURCES += drivers/arm/cci/cci.c \
Leo Yan3886dc62020-03-02 22:15:08 +0800103 drivers/arm/pl061/pl061_gpio.c \
104 drivers/gpio/gpio.c \
Haojian Zhuang1b5c2252017-06-01 15:20:46 +0800105 lib/cpus/aarch64/cortex_a53.S \
106 lib/cpus/aarch64/cortex_a72.S \
107 lib/cpus/aarch64/cortex_a73.S \
Antonio Nino Diaz582c2d72018-09-24 17:23:47 +0100108 plat/common/plat_psci_common.c \
Haojian Zhuang1b5c2252017-06-01 15:20:46 +0800109 plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \
110 plat/hisilicon/hikey960/hikey960_bl31_setup.c \
Leo Yan3886dc62020-03-02 22:15:08 +0800111 plat/hisilicon/hikey960/hikey960_bl_common.c \
Haojian Zhuang1b5c2252017-06-01 15:20:46 +0800112 plat/hisilicon/hikey960/hikey960_pm.c \
113 plat/hisilicon/hikey960/hikey960_topology.c \
114 plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c \
115 plat/hisilicon/hikey960/drivers/ipc/hisi_ipc.c \
116 ${HIKEY960_GIC_SOURCES}
Victor Chongcb27a352017-07-12 01:07:29 +0900117
Teddy Reeddd3f0a82018-09-03 17:38:50 -0400118ifneq (${TRUSTED_BOARD_BOOT},0)
119
120include drivers/auth/mbedtls/mbedtls_crypto.mk
121include drivers/auth/mbedtls/mbedtls_x509.mk
122
Teddy Reeddd3f0a82018-09-03 17:38:50 -0400123AUTH_SOURCES := drivers/auth/auth_mod.c \
124 drivers/auth/crypto_mod.c \
125 drivers/auth/img_parser_mod.c \
Manish V Badarkhe043fd622020-05-16 16:36:39 +0100126 drivers/auth/tbbr/tbbr_cot_common.c
Teddy Reeddd3f0a82018-09-03 17:38:50 -0400127
128BL1_SOURCES += ${AUTH_SOURCES} \
129 plat/common/tbbr/plat_tbbr.c \
130 plat/hisilicon/hikey960/hikey960_tbbr.c \
Manish V Badarkhe043fd622020-05-16 16:36:39 +0100131 plat/hisilicon/hikey960/hikey960_rotpk.S \
132 drivers/auth/tbbr/tbbr_cot_bl1.c
Teddy Reeddd3f0a82018-09-03 17:38:50 -0400133
134BL2_SOURCES += ${AUTH_SOURCES} \
135 plat/common/tbbr/plat_tbbr.c \
136 plat/hisilicon/hikey960/hikey960_tbbr.c \
Manish V Badarkhe043fd622020-05-16 16:36:39 +0100137 plat/hisilicon/hikey960/hikey960_rotpk.S \
138 drivers/auth/tbbr/tbbr_cot_bl2.c
Teddy Reeddd3f0a82018-09-03 17:38:50 -0400139
140ROT_KEY = $(BUILD_PLAT)/rot_key.pem
141ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin
142
143$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
144$(BUILD_PLAT)/bl1/hikey960_rotpk.o: $(ROTPK_HASH)
145$(BUILD_PLAT)/bl2/hikey960_rotpk.o: $(ROTPK_HASH)
146
147certificates: $(ROT_KEY)
148$(ROT_KEY): | $(BUILD_PLAT)
149 @echo " OPENSSL $@"
Salome Thirot0b35da32022-07-14 16:14:15 +0100150 $(Q)${OPENSSL_BIN_PATH}/openssl genrsa 2048 > $@ 2>/dev/null
Teddy Reeddd3f0a82018-09-03 17:38:50 -0400151
152$(ROTPK_HASH): $(ROT_KEY)
153 @echo " OPENSSL $@"
Salome Thirot0b35da32022-07-14 16:14:15 +0100154 $(Q)${OPENSSL_BIN_PATH}/openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
155 ${OPENSSL_BIN_PATH}/openssl dgst -sha256 -binary > $@ 2>/dev/null
Teddy Reeddd3f0a82018-09-03 17:38:50 -0400156endif
157
Victor Chongcb27a352017-07-12 01:07:29 +0900158# Enable workarounds for selected Cortex-A53 errata.
159ERRATA_A53_836870 := 1
160ERRATA_A53_843419 := 1
161ERRATA_A53_855873 := 1
Leo Yan453940d2017-11-22 17:10:39 +0800162
163FIP_ALIGN := 512
Lukas Hanel8a4de612022-03-01 14:18:22 +0100164
165# SPM dispatcher
166ifeq (${SPD},spmd)
Lukas Hanel5258be12022-03-01 17:02:31 +0100167ifeq (${SPMC_AT_EL3},1)
Lukas Hanelcb91cb12022-03-01 15:40:39 +0100168# include device tree helper library
169include lib/libfdt/libfdt.mk
170BL31_SOURCES += common/fdt_wrappers.c \
171 ${LIBFDT_SRCS} \
172 common/uuid.c
173
Lukas Hanel5258be12022-03-01 17:02:31 +0100174# Add support for platform supplied linker script for BL31 build
175$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
176endif
177
Lukas Hanel8a4de612022-03-01 14:18:22 +0100178ifeq ($(PLAT_SP_MANIFEST_DTS),)
179 $(error "Error: A SP manifest is required for the SPMC.")
180endif
181FDT_SOURCES += ${PLAT_SP_MANIFEST_DTS}
182endif