Varun Wadekar | bef02f0 | 2020-04-17 19:09:21 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <platform_def.h> |
| 8 | |
| 9 | #include <bl31/ehf.h> |
| 10 | |
| 11 | /* |
| 12 | * Enumeration of priority levels on Tegra platforms. |
| 13 | */ |
| 14 | ehf_pri_desc_t tegra_exceptions[] = { |
| 15 | /* Watchdog priority */ |
| 16 | EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_TEGRA_WDT_PRIO), |
| 17 | |
| 18 | #if SDEI_SUPPORT |
| 19 | /* Critical priority SDEI */ |
| 20 | EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SDEI_CRITICAL_PRI), |
| 21 | |
| 22 | /* Normal priority SDEI */ |
| 23 | EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SDEI_NORMAL_PRI), |
| 24 | #endif |
| 25 | }; |
| 26 | |
| 27 | /* Plug in Tegra exceptions to Exception Handling Framework. */ |
| 28 | EHF_REGISTER_PRIORITIES(tegra_exceptions, ARRAY_SIZE(tegra_exceptions), PLAT_PRI_BITS); |