Haojian Zhuang | 934ae71 | 2017-05-24 08:47:49 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch_helpers.h> |
| 8 | #include <assert.h> |
| 9 | #include <bl_common.h> |
| 10 | #include <console.h> |
| 11 | #include <debug.h> |
| 12 | #include <hi6220.h> |
| 13 | #include <mmio.h> |
| 14 | #include <platform.h> |
| 15 | #include <platform_def.h> |
| 16 | #include <string.h> |
| 17 | |
| 18 | #define MCU_SECTION_MAX 30 |
| 19 | |
| 20 | enum MCU_IMAGE_SEC_TYPE_ENUM { |
| 21 | MCU_IMAGE_SEC_TYPE_TEXT = 0, /* text section */ |
| 22 | MCU_IMAGE_SEC_TYPE_DATA, /* data section */ |
| 23 | MCU_IMAGE_SEC_TYPE_BUTT |
| 24 | }; |
| 25 | |
| 26 | enum MCU_IMAGE_SEC_LOAD_ENUM { |
| 27 | MCU_IMAGE_SEC_LOAD_STATIC = 0, |
| 28 | MCU_IMAGE_SEC_LOAD_DYNAMIC, |
| 29 | MCU_IMAGE_SEC_LOAD_BUFFER, |
| 30 | MCU_IMAGE_SEC_LOAD_MODEM_ENTRY, |
| 31 | MCU_IMAGE_SEC_LOAD_BUTT |
| 32 | }; |
| 33 | |
| 34 | struct mcu_image_sec { |
| 35 | unsigned short serial; |
| 36 | char type; |
| 37 | char load_attr; |
| 38 | uint32_t src_offset; /* offset in image */ |
| 39 | uint32_t dst_offset; /* offset in memory */ |
| 40 | uint32_t size; |
| 41 | }; |
| 42 | |
| 43 | struct mcu_image_head { |
| 44 | char time_stamp[24]; |
| 45 | uint32_t image_size; |
| 46 | uint32_t secs_num; |
| 47 | struct mcu_image_sec secs[MCU_SECTION_MAX]; |
| 48 | }; |
| 49 | |
| 50 | #define SOC_SRAM_M3_BASE_ADDR (0xF6000000) |
| 51 | |
| 52 | #define MCU_SRAM_SIZE (0x0000C000) |
| 53 | #define MCU_CACHE_SIZE (0x00004000) |
| 54 | #define MCU_CODE_SIZE (MCU_SRAM_SIZE - MCU_CACHE_SIZE) |
| 55 | |
| 56 | #define MCU_SYS_MEM_ADDR (0x05E00000) |
| 57 | #define MCU_SYS_MEM_SIZE (0x00100000) |
| 58 | |
| 59 | static uint32_t mcu2ap_addr(uint32_t mcu_addr) |
| 60 | { |
| 61 | if (mcu_addr < MCU_CODE_SIZE) |
| 62 | return (mcu_addr + SOC_SRAM_M3_BASE_ADDR); |
| 63 | else if ((mcu_addr >= MCU_SRAM_SIZE) && |
| 64 | (mcu_addr < MCU_SRAM_SIZE + MCU_SYS_MEM_SIZE)) |
| 65 | return mcu_addr - MCU_SRAM_SIZE + MCU_SYS_MEM_ADDR; |
| 66 | else |
| 67 | return mcu_addr; |
| 68 | } |
| 69 | |
| 70 | static int is_binary_header_invalid(struct mcu_image_head *head, |
| 71 | unsigned int length) |
| 72 | { |
| 73 | /* invalid cases */ |
| 74 | if ((head->image_size == 0) || |
| 75 | (head->image_size > length) || |
| 76 | (head->secs_num > MCU_SECTION_MAX) || |
| 77 | (head->secs_num == 0)) |
| 78 | return 1; |
| 79 | |
| 80 | return 0; |
| 81 | } |
| 82 | |
| 83 | static int is_binary_section_invalid(struct mcu_image_sec *sec, |
| 84 | struct mcu_image_head *head) |
| 85 | { |
| 86 | unsigned long ap_dst_offset = 0; |
| 87 | |
| 88 | if ((sec->serial >= head->secs_num) || |
| 89 | (sec->src_offset + sec->size > head->image_size)) |
| 90 | return 1; |
| 91 | |
| 92 | if ((sec->type >= MCU_IMAGE_SEC_TYPE_BUTT) || |
| 93 | (sec->load_attr >= MCU_IMAGE_SEC_LOAD_BUTT)) |
| 94 | return 1; |
| 95 | |
| 96 | ap_dst_offset = mcu2ap_addr(sec->dst_offset); |
| 97 | if ((ap_dst_offset >= SOC_SRAM_M3_BASE_ADDR) && |
| 98 | (ap_dst_offset < SOC_SRAM_M3_BASE_ADDR + 0x20000 - sec->size)) |
| 99 | return 0; |
| 100 | else if ((ap_dst_offset >= MCU_SYS_MEM_ADDR) && |
| 101 | (ap_dst_offset < MCU_SYS_MEM_ADDR + MCU_SYS_MEM_SIZE - sec->size)) |
| 102 | return 0; |
| 103 | else if ((ap_dst_offset >= 0xfff8e000) && |
| 104 | (ap_dst_offset < 0xfff91c00 - sec->size)) |
| 105 | return 0; |
| 106 | |
| 107 | ERROR("%s: mcu destination address invalid.\n", __func__); |
| 108 | ERROR("%s: number=%d, dst offset=%d size=%d\n", |
| 109 | __func__, sec->serial, sec->dst_offset, sec->size); |
| 110 | return 1; |
| 111 | } |
| 112 | |
| 113 | void hisi_mcu_enable_sram(void) |
| 114 | { |
| 115 | mmio_write_32(AO_SC_PERIPH_CLKEN4, |
| 116 | AO_SC_PERIPH_CLKEN4_HCLK_IPC_S | |
| 117 | AO_SC_PERIPH_CLKEN4_HCLK_IPC_NS); |
| 118 | |
| 119 | /* set register to enable dvfs which is used by mcu */ |
| 120 | mmio_write_32(PERI_SC_RESERVED8_ADDR, 0x0A001022); |
| 121 | |
| 122 | /* mcu mem is powered on, need de-assert reset */ |
| 123 | mmio_write_32(AO_SC_PERIPH_RSTDIS4, |
| 124 | AO_SC_PERIPH_RSTDIS4_RESET_MCU_ECTR_N); |
| 125 | |
| 126 | /* enable mcu hclk */ |
| 127 | mmio_write_32(AO_SC_PERIPH_CLKEN4, |
| 128 | AO_SC_PERIPH_CLKEN4_HCLK_MCU | |
| 129 | AO_SC_PERIPH_CLKEN4_CLK_MCU_DAP); |
| 130 | } |
| 131 | |
| 132 | void hisi_mcu_start_run(void) |
| 133 | { |
| 134 | unsigned int val; |
| 135 | |
| 136 | /* set mcu ddr remap configuration */ |
| 137 | mmio_write_32(AO_SC_MCU_SUBSYS_CTRL2, MCU_SYS_MEM_ADDR); |
| 138 | |
| 139 | /* de-assert reset for mcu and to run */ |
| 140 | mmio_write_32(AO_SC_PERIPH_RSTDIS4, |
| 141 | AO_SC_PERIPH_RSTDIS4_RESET_MCU_ECTR_N | |
| 142 | AO_SC_PERIPH_RSTDIS4_RESET_MCU_SYS_N | |
| 143 | AO_SC_PERIPH_RSTDIS4_RESET_MCU_POR_N | |
| 144 | AO_SC_PERIPH_RSTDIS4_RESET_MCU_DAP_N); |
| 145 | |
| 146 | val = mmio_read_32(AO_SC_SYS_CTRL2); |
| 147 | mmio_write_32(AO_SC_SYS_CTRL2, |
| 148 | val | AO_SC_SYS_CTRL2_GLB_SRST_STAT_CLEAR); |
| 149 | |
| 150 | INFO("%s: AO_SC_SYS_CTRL2=%x\n", __func__, |
| 151 | mmio_read_32(AO_SC_SYS_CTRL2)); |
| 152 | } |
| 153 | |
| 154 | int hisi_mcu_load_image(uintptr_t image_base, uint32_t image_size) |
| 155 | { |
| 156 | unsigned int i; |
| 157 | struct mcu_image_head *head; |
| 158 | char *buf; |
| 159 | |
| 160 | head = (struct mcu_image_head *)image_base; |
| 161 | if (is_binary_header_invalid(head, image_size)) { |
| 162 | ERROR("Invalid %s image header.\n", head->time_stamp); |
| 163 | return -1; |
| 164 | } |
| 165 | |
| 166 | buf = (char *)head; |
| 167 | for (i = 0; i < head->secs_num; i++) { |
| 168 | |
| 169 | int *src, *dst; |
| 170 | |
| 171 | /* check the sections */ |
| 172 | if (is_binary_section_invalid(&head->secs[i], head)) { |
| 173 | ERROR("Invalid mcu section.\n"); |
| 174 | return -1; |
| 175 | } |
| 176 | |
| 177 | /* check if the section is static-loaded */ |
| 178 | if (head->secs[i].load_attr != MCU_IMAGE_SEC_LOAD_STATIC) |
| 179 | continue; |
| 180 | |
| 181 | /* copy the sections */ |
| 182 | src = (int *)(intptr_t)(buf + head->secs[i].src_offset); |
| 183 | dst = (int *)(intptr_t)mcu2ap_addr(head->secs[i].dst_offset); |
| 184 | |
| 185 | memcpy((void *)dst, (void *)src, head->secs[i].size); |
| 186 | |
| 187 | INFO("%s: mcu sections %d:\n", __func__, i); |
| 188 | INFO("%s: src = 0x%x\n", |
| 189 | __func__, (unsigned int)(uintptr_t)src); |
| 190 | INFO("%s: dst = 0x%x\n", |
| 191 | __func__, (unsigned int)(uintptr_t)dst); |
| 192 | INFO("%s: size = %d\n", __func__, head->secs[i].size); |
| 193 | |
| 194 | INFO("%s: [SRC 0x%x] 0x%x 0x%x 0x%x 0x%x\n", |
| 195 | __func__, (unsigned int)(uintptr_t)src, |
| 196 | src[0], src[1], src[2], src[3]); |
| 197 | INFO("%s: [DST 0x%x] 0x%x 0x%x 0x%x 0x%x\n", |
| 198 | __func__, (unsigned int)(uintptr_t)dst, |
| 199 | dst[0], dst[1], dst[2], dst[3]); |
| 200 | } |
| 201 | |
| 202 | return 0; |
| 203 | } |