| Pali Rohár | 52c1de5 | 2021-05-14 15:52:11 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2018 Marvell International Ltd. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | * https://spdx.org/licenses |
| 6 | */ |
| 7 | |
| 8 | #include <asm_macros.S> |
| 9 | #include <platform_def.h> |
| 10 | |
| 11 | /* |
| 12 | * Below address in used only for reading, therefore no problem with concurrent |
| 13 | * Linux access. |
| 14 | */ |
| 15 | #define MVEBU_TEST_PIN_LATCH_N (MVEBU_NB_GPIO_REG_BASE + 0x8) |
| 16 | #define MVEBU_XTAL_MODE_MASK BIT(9) |
| 17 | |
| 18 | /* ----------------------------------------------------- |
| 19 | * uint32_t get_ref_clk (void); |
| 20 | * |
| 21 | * returns reference clock in MHz (25 or 40) |
| 22 | * ----------------------------------------------------- |
| 23 | */ |
| 24 | .globl get_ref_clk |
| 25 | func get_ref_clk |
| 26 | mov_imm x0, MVEBU_TEST_PIN_LATCH_N |
| 27 | ldr w0, [x0] |
| 28 | tst w0, #MVEBU_XTAL_MODE_MASK |
| 29 | bne 40 |
| 30 | mov w0, #25 |
| 31 | ret |
| 32 | 40: |
| 33 | mov w0, #40 |
| 34 | ret |
| 35 | endfunc get_ref_clk |