Heiko Stuebner | 87b9a3c | 2019-03-14 22:12:04 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef SOC_H |
| 8 | #define SOC_H |
| 9 | |
| 10 | enum plls_id { |
| 11 | APLL_ID = 0, |
| 12 | DPLL_ID, |
| 13 | CPLL_ID, |
| 14 | GPLL_ID, |
| 15 | NPLL_ID, |
| 16 | END_PLL_ID, |
| 17 | }; |
| 18 | |
| 19 | |
| 20 | #define CYCL_24M_CNT_US(us) (24 * (us)) |
| 21 | #define CYCL_24M_CNT_MS(ms) ((ms) * CYCL_24M_CNT_US(1000)) |
| 22 | |
| 23 | /***************************************************************************** |
| 24 | * grf regs |
| 25 | *****************************************************************************/ |
| 26 | #define GRF_UOC0_CON0 0x320 |
| 27 | #define GRF_UOC1_CON0 0x334 |
| 28 | #define GRF_UOC2_CON0 0x348 |
| 29 | #define GRF_SIDDQ BIT(13) |
| 30 | |
| 31 | /***************************************************************************** |
| 32 | * cru reg, offset |
| 33 | *****************************************************************************/ |
| 34 | #define CRU_SOFTRST_CON 0x1b8 |
| 35 | #define CRU_SOFTRSTS_CON(n) (CRU_SOFTRST_CON + ((n) * 4)) |
| 36 | #define CRU_SOFTRSTS_CON_CNT 11 |
| 37 | |
| 38 | #define RST_DMA1_MSK 0x4 |
| 39 | #define RST_DMA2_MSK 0x1 |
| 40 | |
| 41 | #define CRU_CLKSEL_CON 0x60 |
| 42 | #define CRU_CLKSELS_CON(i) (CRU_CLKSEL_CON + ((i) * 4)) |
| 43 | #define CRU_CLKSELS_CON_CNT 42 |
| 44 | |
| 45 | #define CRU_CLKGATE_CON 0x160 |
| 46 | #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4)) |
| 47 | #define CRU_CLKGATES_CON_CNT 18 |
| 48 | |
| 49 | #define CRU_GLB_SRST_FST 0x1b0 |
| 50 | #define CRU_GLB_SRST_SND 0x1b4 |
| 51 | #define CRU_GLB_RST_CON 0x1f0 |
| 52 | |
| 53 | #define CRU_CONS_GATEID(i) (16 * (i)) |
| 54 | #define GATE_ID(reg, bit) (((reg) * 16) + (bit)) |
| 55 | |
| 56 | #define PMU_RST_MASK 0x3 |
| 57 | #define PMU_RST_BY_FIRST_SFT (0 << 2) |
| 58 | #define PMU_RST_BY_SECOND_SFT (1 << 2) |
| 59 | #define PMU_RST_NOT_BY_SFT (2 << 2) |
| 60 | |
| 61 | /*************************************************************************** |
| 62 | * pll |
| 63 | ***************************************************************************/ |
| 64 | #define PLL_CON_COUNT 4 |
| 65 | #define PLL_CONS(id, i) ((id) * 0x10 + ((i) * 4)) |
| 66 | #define PLL_PWR_DN_MSK BIT(1) |
| 67 | #define PLL_PWR_DN REG_WMSK_BITS(1, 1, 0x1) |
| 68 | #define PLL_PWR_ON REG_WMSK_BITS(0, 1, 0x1) |
| 69 | #define PLL_RESET REG_WMSK_BITS(1, 5, 0x1) |
| 70 | #define PLL_RESET_RESUME REG_WMSK_BITS(0, 5, 0x1) |
| 71 | #define PLL_BYPASS_MSK BIT(0) |
| 72 | #define PLL_BYPASS_W_MSK (PLL_BYPASS_MSK << 16) |
| 73 | #define PLL_BYPASS REG_WMSK_BITS(1, 0, 0x1) |
| 74 | #define PLL_NO_BYPASS REG_WMSK_BITS(0, 0, 0x1) |
| 75 | |
| 76 | #define PLL_MODE_CON 0x50 |
| 77 | |
| 78 | struct deepsleep_data_s { |
| 79 | uint32_t pll_con[END_PLL_ID][PLL_CON_COUNT]; |
| 80 | uint32_t pll_mode; |
| 81 | uint32_t cru_sel_con[CRU_CLKSELS_CON_CNT]; |
| 82 | uint32_t cru_gate_con[CRU_CLKGATES_CON_CNT]; |
| 83 | }; |
| 84 | |
| 85 | #define REG_W_MSK(bits_shift, msk) \ |
| 86 | ((msk) << ((bits_shift) + 16)) |
| 87 | #define REG_VAL_CLRBITS(val, bits_shift, msk) \ |
| 88 | ((val) & (~((msk) << bits_shift))) |
| 89 | #define REG_SET_BITS(bits, bits_shift, msk) \ |
| 90 | (((bits) & (msk)) << (bits_shift)) |
| 91 | #define REG_WMSK_BITS(bits, bits_shift, msk) \ |
| 92 | (REG_W_MSK(bits_shift, msk) | \ |
| 93 | REG_SET_BITS(bits, bits_shift, msk)) |
| 94 | #define REG_SOC_WMSK 0xffff0000 |
| 95 | |
| 96 | #define regs_update_bit_set(addr, shift) \ |
| 97 | regs_update_bits((addr), 0x1, 0x1, (shift)) |
| 98 | #define regs_update_bit_clr(addr, shift) \ |
| 99 | regs_update_bits((addr), 0x0, 0x1, (shift)) |
| 100 | |
| 101 | void regs_update_bits(uintptr_t addr, uint32_t val, |
| 102 | uint32_t mask, uint32_t shift); |
| 103 | void clk_plls_suspend(void); |
| 104 | void clk_plls_resume(void); |
| 105 | void clk_gate_con_save(void); |
| 106 | void clk_gate_con_disable(void); |
| 107 | void clk_gate_con_restore(void); |
| 108 | void clk_sel_con_save(void); |
| 109 | void clk_sel_con_restore(void); |
| 110 | #endif /* SOC_H */ |