Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 1 | /* |
Varun Wadekar | 953699c | 2018-06-06 17:26:10 -0700 | [diff] [blame] | 2 | * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <arch_helpers.h> |
| 9 | #include <assert.h> |
| 10 | #include <common/bl_common.h> |
| 11 | #include <lib/el3_runtime/context_mgmt.h> |
| 12 | #include <common/debug.h> |
| 13 | #include <errno.h> |
| 14 | #include <mce.h> |
| 15 | #include <memctrl.h> |
| 16 | #include <common/runtime_svc.h> |
| 17 | #include <tegra_private.h> |
Vignesh Radhakrishnan | d7a5c25 | 2017-05-25 16:27:42 -0700 | [diff] [blame] | 18 | #include <tegra_platform.h> |
| 19 | #include <stdbool.h> |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 20 | |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 21 | /******************************************************************************* |
Varun Wadekar | 362a6b2 | 2017-11-10 11:04:42 -0800 | [diff] [blame] | 22 | * Tegra194 SiP SMCs |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 23 | ******************************************************************************/ |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 24 | |
| 25 | /******************************************************************************* |
Varun Wadekar | 362a6b2 | 2017-11-10 11:04:42 -0800 | [diff] [blame] | 26 | * This function is responsible for handling all T194 SiP calls |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 27 | ******************************************************************************/ |
Anthony Zhou | 8bf6d4e | 2017-09-20 17:44:43 +0800 | [diff] [blame] | 28 | int32_t plat_sip_handler(uint32_t smc_fid, |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 29 | uint64_t x1, |
| 30 | uint64_t x2, |
| 31 | uint64_t x3, |
| 32 | uint64_t x4, |
Varun Wadekar | 5c5f78c | 2017-04-28 18:15:09 -0700 | [diff] [blame] | 33 | const void *cookie, |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 34 | void *handle, |
| 35 | uint64_t flags) |
| 36 | { |
Varun Wadekar | 7aa6c03 | 2017-10-19 12:02:17 -0700 | [diff] [blame] | 37 | int32_t ret = -ENOTSUP; |
Anthony Zhou | 8bf6d4e | 2017-09-20 17:44:43 +0800 | [diff] [blame] | 38 | |
Varun Wadekar | 953699c | 2018-06-06 17:26:10 -0700 | [diff] [blame] | 39 | (void)smc_fid; |
Varun Wadekar | 7aa6c03 | 2017-10-19 12:02:17 -0700 | [diff] [blame] | 40 | (void)x1; |
Anthony Zhou | 8bf6d4e | 2017-09-20 17:44:43 +0800 | [diff] [blame] | 41 | (void)x4; |
| 42 | (void)cookie; |
| 43 | (void)flags; |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 44 | |
Anthony Zhou | 8bf6d4e | 2017-09-20 17:44:43 +0800 | [diff] [blame] | 45 | return ret; |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 46 | } |