| Soby Mathew | acc144b | 2016-05-05 12:53:53 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | #ifndef __SMCC_MACROS_S__ |
| 31 | #define __SMCC_MACROS_S__ |
| 32 | |
| 33 | #include <arch.h> |
| 34 | |
| 35 | /* |
| 36 | * Macro to save the General purpose registers including the banked |
| 37 | * registers to the SMC context on entry due a SMC call. On return, r0 |
| 38 | * contains the pointer to the `smc_context_t`. |
| 39 | */ |
| 40 | .macro smcc_save_gp_mode_regs |
| 41 | push {r0-r3, lr} |
| 42 | |
| 43 | ldcopr r0, SCR |
| 44 | and r0, r0, #SCR_NS_BIT |
| 45 | bl smc_get_ctx |
| 46 | |
| 47 | /* Save r4 - r12 in the SMC context */ |
| 48 | add r1, r0, #SMC_CTX_GPREG_R4 |
| 49 | stm r1!, {r4-r12} |
| 50 | |
| 51 | /* |
| 52 | * Pop r0 - r3, lr to r4 - r7, lr from stack and then save |
| 53 | * it to SMC context. |
| 54 | */ |
| 55 | pop {r4-r7, lr} |
| 56 | stm r0, {r4-r7} |
| 57 | |
| 58 | /* Save the banked registers including the current SPSR and LR */ |
| 59 | mrs r4, sp_usr |
| 60 | mrs r5, lr_usr |
| 61 | mrs r6, spsr_irq |
| 62 | mrs r7, sp_irq |
| 63 | mrs r8, lr_irq |
| 64 | mrs r9, spsr_fiq |
| 65 | mrs r10, sp_fiq |
| 66 | mrs r11, lr_fiq |
| 67 | mrs r12, spsr_svc |
| 68 | stm r1!, {r4-r12} |
| 69 | |
| 70 | mrs r4, sp_svc |
| 71 | mrs r5, lr_svc |
| 72 | mrs r6, spsr_abt |
| 73 | mrs r7, sp_abt |
| 74 | mrs r8, lr_abt |
| 75 | mrs r9, spsr_und |
| 76 | mrs r10, sp_und |
| 77 | mrs r11, lr_und |
| 78 | mrs r12, spsr |
| 79 | stm r1!, {r4-r12, lr} |
| 80 | |
| 81 | .endm |
| 82 | |
| 83 | /* |
| 84 | * Macro to restore the General purpose registers including the banked |
| 85 | * registers from the SMC context prior to exit from the SMC call. |
| 86 | * r0 must point to the `smc_context_t` to restore from. |
| 87 | */ |
| 88 | .macro smcc_restore_gp_mode_regs |
| 89 | |
| 90 | /* Restore the banked registers including the current SPSR and LR */ |
| 91 | add r1, r0, #SMC_CTX_SP_USR |
| 92 | ldm r1!, {r4-r12} |
| 93 | msr sp_usr, r4 |
| 94 | msr lr_usr, r5 |
| 95 | msr spsr_irq, r6 |
| 96 | msr sp_irq, r7 |
| 97 | msr lr_irq, r8 |
| 98 | msr spsr_fiq, r9 |
| 99 | msr sp_fiq, r10 |
| 100 | msr lr_fiq, r11 |
| 101 | msr spsr_svc, r12 |
| 102 | |
| 103 | ldm r1!, {r4-r12, lr} |
| 104 | msr sp_svc, r4 |
| 105 | msr lr_svc, r5 |
| 106 | msr spsr_abt, r6 |
| 107 | msr sp_abt, r7 |
| 108 | msr lr_abt, r8 |
| 109 | msr spsr_und, r9 |
| 110 | msr sp_und, r10 |
| 111 | msr lr_und, r11 |
| 112 | msr spsr, r12 |
| 113 | |
| 114 | /* Restore the rest of the general purpose registers */ |
| 115 | ldm r0, {r0-r12} |
| 116 | .endm |
| 117 | |
| 118 | #endif /* __SMCC_MACROS_S__ */ |