| Carlo Caione | 57300ff | 2019-09-18 11:29:48 +0100 | [diff] [blame] | 1 | Amlogic Meson S905X2 (G12A) |
| Paul Beesley | f2ec714 | 2019-10-04 16:17:46 +0000 | [diff] [blame] | 2 | =========================== |
| Carlo Caione | 57300ff | 2019-09-18 11:29:48 +0100 | [diff] [blame] | 3 | |
| 4 | The Amlogic Meson S905X2 is a SoC with a quad core Arm Cortex-A53 running at |
| 5 | ~1.8GHz. It also contains a Cortex-M3 used as SCP. |
| 6 | |
| 7 | This port is a minimal implementation of BL31 capable of booting mainline U-Boot |
| 8 | and Linux: |
| 9 | |
| 10 | - SCPI support. |
| 11 | - Basic PSCI support (CPU_ON, CPU_OFF, SYSTEM_RESET, SYSTEM_OFF). Note that CPU0 |
| 12 | can't be turned off, so there is a workaround to hide this from the caller. |
| 13 | - GICv2 driver set up. |
| 14 | - Basic SIP services (read efuse data, enable/disable JTAG). |
| 15 | |
| 16 | In order to build it: |
| 17 | |
| 18 | .. code:: shell |
| 19 | |
| Mark Dykes | ef3a456 | 2020-01-08 20:37:18 +0000 | [diff] [blame] | 20 | CROSS_COMPILE=aarch64-linux-gnu- make DEBUG=1 PLAT=g12a |
| Carlo Caione | 57300ff | 2019-09-18 11:29:48 +0100 | [diff] [blame] | 21 | |
| 22 | This port has been tested on a SEI510 board. After building it, follow the |
| Sandrine Bailleux | 4e82472 | 2020-07-01 13:53:07 +0200 | [diff] [blame] | 23 | instructions in the `gxlimg repository`_ or `U-Boot repository`_, replacing the |
| Carlo Caione | 57300ff | 2019-09-18 11:29:48 +0100 | [diff] [blame] | 24 | mentioned **bl31.img** by the one built from this port. |
| 25 | |
| 26 | .. _gxlimg repository: https://github.com/repk/gxlimg/blob/master/README.g12a |
| Sandrine Bailleux | 4e82472 | 2020-07-01 13:53:07 +0200 | [diff] [blame] | 27 | .. _U-Boot repository: https://github.com/u-boot/u-boot/blob/master/doc/board/amlogic/sei510.rst |