| Paul Beesley | ea22512 | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 1 | Platform Ports |
| 2 | ============== |
| 3 | |
| 4 | .. toctree:: |
| 5 | :maxdepth: 1 |
| 6 | :caption: Contents |
| 7 | :numbered: |
| Paul Beesley | 866392d | 2019-10-16 13:41:13 +0000 | [diff] [blame^] | 8 | :hidden: |
| Paul Beesley | ea22512 | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 9 | |
| 10 | allwinner |
| Paul Beesley | 743d088 | 2019-09-25 12:58:36 +0000 | [diff] [blame] | 11 | meson-gxbb |
| 12 | meson-gxl |
| Paul Beesley | 23cfacc | 2019-10-04 10:37:48 +0000 | [diff] [blame] | 13 | meson-g12a |
| Paul Beesley | ea22512 | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 14 | fvp_ve |
| Paul Beesley | 743d088 | 2019-09-25 12:58:36 +0000 | [diff] [blame] | 15 | hikey |
| 16 | hikey960 |
| 17 | intel-agilex |
| Paul Beesley | ea22512 | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 18 | intel-stratix10 |
| Paul Beesley | 9774302 | 2019-07-12 11:37:07 +0100 | [diff] [blame] | 19 | marvell/index |
| Paul Beesley | ea22512 | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 20 | mt8183 |
| 21 | nvidia-tegra |
| Paul Beesley | 743d088 | 2019-09-25 12:58:36 +0000 | [diff] [blame] | 22 | warp7 |
| 23 | imx8 |
| 24 | imx8m |
| 25 | ls1043a |
| 26 | poplar |
| Paul Beesley | ea22512 | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 27 | qemu |
| Paul Beesley | 23cfacc | 2019-10-04 10:37:48 +0000 | [diff] [blame] | 28 | qemu-sbsa |
| Paul Beesley | 743d088 | 2019-09-25 12:58:36 +0000 | [diff] [blame] | 29 | rpi3 |
| Paul Beesley | 23cfacc | 2019-10-04 10:37:48 +0000 | [diff] [blame] | 30 | rpi4 |
| Paul Beesley | ea22512 | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 31 | rcar-gen3 |
| 32 | rockchip |
| Paul Beesley | ea22512 | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 33 | socionext-uniphier |
| Paul Beesley | ea22512 | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 34 | synquacer |
| Paul Beesley | 743d088 | 2019-09-25 12:58:36 +0000 | [diff] [blame] | 35 | stm32mp1 |
| Paul Beesley | ea22512 | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 36 | ti-k3 |
| Paul Beesley | f3653a6 | 2019-05-22 11:22:44 +0100 | [diff] [blame] | 37 | xilinx-versal |
| Paul Beesley | ea22512 | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 38 | xilinx-zynqmp |
| Paul Beesley | 866392d | 2019-10-16 13:41:13 +0000 | [diff] [blame^] | 39 | |
| 40 | This section provides a list of supported upstream *platform ports* and the |
| 41 | documentation associated with them. The list of suported Arm |FVP| platforms is |
| 42 | outlined in the following section. |
| 43 | |
| 44 | .. note:: |
| 45 | In addition to the platforms ports listed within the table of contents, there |
| 46 | are several additional platforms that are supported upstream but which do not |
| 47 | currently have associated documentation: |
| 48 | |
| 49 | - Arm Juno Software Development Platform. Various |AArch32| and |AArch64| |
| 50 | builds of this release have been tested on r0, r1 and r2 variants of the |
| 51 | `Juno Arm Development Platform`_. |
| 52 | - Arm Neoverse N1 System Development Platform (N1SDP) |
| 53 | - Arm Neoverse Reference Design N1 Edge (RD-N1-Edge) FVP |
| 54 | - Arm Neoverse Reference Design E1 Edge (RD-E1-Edge) FVP |
| 55 | - Arm SGI-575 and SGM-775 |
| 56 | - MediaTek MT6795 and MT8173 SoCs |
| 57 | |
| 58 | Fixed Virtual Platform (FVP) Support |
| 59 | ------------------------------------ |
| 60 | |
| 61 | The latest version of the AArch64 build of TF-A has been tested on the |
| 62 | following Arm FVPs without shifted affinities, and that do not support threaded |
| 63 | CPU cores (64-bit host machine only). |
| 64 | |
| 65 | .. note:: |
| 66 | The FVP models used are Version 11.6 Build 45, unless otherwise stated. |
| 67 | |
| 68 | - ``FVP_Base_AEMv8A-AEMv8A`` |
| 69 | - ``FVP_Base_AEMv8A-AEMv8A-AEMv8A-AEMv8A-CCN502`` |
| 70 | - ``FVP_Base_RevC-2xAEMv8A`` |
| 71 | - ``FVP_Base_Cortex-A32x4`` |
| 72 | - ``FVP_Base_Cortex-A35x4`` |
| 73 | - ``FVP_Base_Cortex-A53x4`` |
| 74 | - ``FVP_Base_Cortex-A55x4+Cortex-A75x4`` |
| 75 | - ``FVP_Base_Cortex-A55x4`` |
| 76 | - ``FVP_Base_Cortex-A57x1-A53x1`` |
| 77 | - ``FVP_Base_Cortex-A57x2-A53x4`` |
| 78 | - ``FVP_Base_Cortex-A57x4-A53x4`` |
| 79 | - ``FVP_Base_Cortex-A57x4`` |
| 80 | - ``FVP_Base_Cortex-A72x4-A53x4`` |
| 81 | - ``FVP_Base_Cortex-A72x4`` |
| 82 | - ``FVP_Base_Cortex-A73x4-A53x4`` |
| 83 | - ``FVP_Base_Cortex-A73x4`` |
| 84 | - ``FVP_Base_Cortex-A75x4`` |
| 85 | - ``FVP_Base_Cortex-A76x4`` |
| 86 | - ``FVP_Base_Cortex-A76AEx4`` (Tested with internal model) |
| 87 | - ``FVP_Base_Cortex-A76AEx8`` (Tested with internal model) |
| 88 | - ``FVP_Base_Cortex-A77x4`` (Version 11.7 build 36) |
| 89 | - ``FVP_Base_Neoverse-N1x4`` (Tested with internal model) |
| 90 | - ``FVP_CSS_SGI-575`` (Version 11.3 build 42) |
| 91 | - ``FVP_CSS_SGM-775`` (Version 11.3 build 42) |
| 92 | - ``FVP_RD_E1Edge`` (Version 11.3 build 42) |
| 93 | - ``FVP_RD_N1Edge`` (Version 11.3 build 42) |
| 94 | - ``Foundation_Platform`` |
| 95 | |
| 96 | The latest version of the AArch32 build of TF-A has been tested on the |
| 97 | following Arm FVPs without shifted affinities, and that do not support threaded |
| 98 | CPU cores (64-bit host machine only). |
| 99 | |
| 100 | - ``FVP_Base_AEMv8A-AEMv8A`` |
| 101 | - ``FVP_Base_Cortex-A32x4`` |
| 102 | |
| 103 | .. note:: |
| 104 | The ``FVP_Base_RevC-2xAEMv8A`` FVP only supports shifted affinities. |
| 105 | |
| 106 | The *Foundation* FVP can be downloaded free of charge. The *Base* FVPs can be |
| 107 | licensed from Arm. See the `Arm FVP website`_. |
| 108 | |
| 109 | All the above platforms have been tested with `Linaro Release 19.06`_. |
| 110 | |
| 111 | -------------- |
| 112 | |
| 113 | *Copyright (c) 2019, Arm Limited. All rights reserved.* |
| 114 | |
| 115 | .. _Juno Arm Development Platform: http://www.arm.com/products/tools/development-boards/versatile-express/juno-arm-development-platform.php |
| 116 | .. _Arm FVP website: https://developer.arm.com/products/system-design/fixed-virtual-platforms |
| 117 | .. _Linaro Release 19.06: http://releases.linaro.org/members/arm/platforms/19.06 |