blob: 7c96b7ee91c23b183060777775441806a059e9d3 [file] [log] [blame]
Jorge Ramirez-Ortiz5ff5eee2018-09-23 09:41:10 +02001/*
2 * Copyright (c) 2018, Renesas Electronics Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include "rcar_def.h"
10
11.global rcar_pwrc_switch_stack
12.global rcar_pwrc_save_generic_timer
13.global rcar_pwrc_restore_generic_timer
14
15#define OFFSET_SP_X9_X10 (0x00)
16#define OFFSET_CNTFID0 (0x10)
17#define OFFSET_CNTPCT_EL0 (0x18)
18#define OFFSET_TIMER_COUNT (0x20)
19
20/*
21 * x0 : jump address,
22 * x1 : stack address,
23 * x2 : arg,
24 * x3 : stack address (temporary)
25 */
26func rcar_pwrc_switch_stack
27
28 /* lr to stack */
29 stp x29, x30, [sp,#-16]
30
31 /* change stack pointer */
32 mov x3, sp
33 mov sp, x1
34
35 /* save stack pointer */
36 sub sp, sp, #16
37 stp x0, x3, [sp]
38
39 /* data synchronization barrier */
40 dsb sy
41
42 /* jump to code */
43 mov x1, x0
44 mov x0, x2
45 blr x1
46
47 /* load stack pointer */
48 ldp x0, x2, [sp,#0]
49
50 /* change stack pointer */
51 mov sp, x2
52
53 /* return */
54 ldp x29, x30, [sp,#-16]
55 ret
56endfunc rcar_pwrc_switch_stack
57
58/* x0 : stack pointer base address */
59func rcar_pwrc_save_generic_timer
60
61 stp x9, x10, [x0, #OFFSET_SP_X9_X10]
62
63 /* save CNTFID0 and cntpct_el0 */
64 mov_imm x10, (RCAR_CNTC_BASE + CNTFID_OFF)
65 ldr x9, [x10]
66 mrs x10, cntpct_el0
67 stp x9, x10, [x0, #OFFSET_CNTFID0]
68
69 ldp x9, x10, [x0, #OFFSET_SP_X9_X10]
70
71 ret
72endfunc rcar_pwrc_save_generic_timer
73
74/* x0 : Stack pointer base address */
75func rcar_pwrc_restore_generic_timer
76
77 stp x9, x10, [x0, #OFFSET_SP_X9_X10]
78
79 /* restore CNTFID0 and cntpct_el0 */
80 ldr x10, [x0, #OFFSET_CNTFID0]
81 mov_imm x9, (RCAR_CNTC_BASE + CNTFID_OFF)
82 str x10, [x9]
83 ldp x9, x10, [x0, #OFFSET_CNTPCT_EL0]
84 add x9, x9, x10
85 str x9, [x0, #OFFSET_TIMER_COUNT]
86
87 ldp x9, x10, [x0, #OFFSET_SP_X9_X10]
88
89 ret
90endfunc rcar_pwrc_restore_generic_timer