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git01.mediatek.com / filogic / atf / 8593e448d8c7cdc8a5f61108db3c537a1f7aadb5 / . / plat / mediatek / mt8173 / platform.mk
blob: 294aea4f8b3606d982ef8056536f1fe19c5eda4f [file] [log] [blame]
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]1#
dp-arm230011c2017-03-07 11:02:47 +0000[diff] [blame]2# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]3#
dp-armfa3cf0b2017-05-03 09:38:09 +0100[diff] [blame]4# SPDX-License-Identifier: BSD-3-Clause
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]5#
6
7MTK_PLAT := plat/mediatek
8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
9
10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
developer550bf5e2016-07-11 16:05:23 +0800[diff] [blame]11 -I${MTK_PLAT}/common/drivers/uart/ \
Koan-Sin Tan1d2b6392016-04-18 15:17:57 +0800[diff] [blame]12 -Iinclude/plat/arm/common \
13 -Iinclude/plat/arm/common/aarch64 \
developereee29802016-05-11 18:45:20 +0800[diff] [blame]14 -I${MTK_PLAT_SOC}/drivers/crypt/ \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]15 -I${MTK_PLAT_SOC}/drivers/mtcmos/ \
16 -I${MTK_PLAT_SOC}/drivers/pmic/ \
17 -I${MTK_PLAT_SOC}/drivers/rtc/ \
18 -I${MTK_PLAT_SOC}/drivers/spm/ \
19 -I${MTK_PLAT_SOC}/drivers/timer/ \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]20 -I${MTK_PLAT_SOC}/include/
21
Soby Mathewcc037c12016-04-08 16:42:58 +0100[diff] [blame]22PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
23 lib/xlat_tables/aarch64/xlat_tables.c \
Koan-Sin Tan1d2b6392016-04-18 15:17:57 +0800[diff] [blame]24 plat/arm/common/arm_gicv2.c \
25 plat/common/plat_gicv2.c
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]26
27BL31_SOURCES += drivers/arm/cci/cci.c \
Koan-Sin Tan1d2b6392016-04-18 15:17:57 +0800[diff] [blame]28 drivers/arm/gic/common/gic_common.c \
29 drivers/arm/gic/v2/gicv2_main.c \
30 drivers/arm/gic/v2/gicv2_helpers.c \
Soby Mathew17231132016-08-08 12:33:06 +0100[diff] [blame]31 drivers/console/aarch64/console.S \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]32 drivers/delay_timer/delay_timer.c \
Antonio Nino Diaz02a09af2016-05-05 15:23:56 +0100[diff] [blame]33 drivers/delay_timer/generic_delay_timer.c \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]34 lib/cpus/aarch64/aem_generic.S \
35 lib/cpus/aarch64/cortex_a53.S \
36 lib/cpus/aarch64/cortex_a57.S \
37 lib/cpus/aarch64/cortex_a72.S \
developer550bf5e2016-07-11 16:05:23 +0800[diff] [blame]38 ${MTK_PLAT}/common/drivers/uart/8250_console.S \
developer14f3fe32016-04-28 14:07:42 +0800[diff] [blame]39 ${MTK_PLAT}/common/mtk_plat_common.c \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]40 ${MTK_PLAT}/common/mtk_sip_svc.c \
41 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
42 ${MTK_PLAT_SOC}/aarch64/platform_common.c \
43 ${MTK_PLAT_SOC}/bl31_plat_setup.c \
developereee29802016-05-11 18:45:20 +0800[diff] [blame]44 ${MTK_PLAT_SOC}/drivers/crypt/crypt.c \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]45 ${MTK_PLAT_SOC}/drivers/mtcmos/mtcmos.c \
46 ${MTK_PLAT_SOC}/drivers/pmic/pmic_wrap_init.c \
47 ${MTK_PLAT_SOC}/drivers/rtc/rtc.c \
48 ${MTK_PLAT_SOC}/drivers/spm/spm.c \
49 ${MTK_PLAT_SOC}/drivers/spm/spm_hotplug.c \
50 ${MTK_PLAT_SOC}/drivers/spm/spm_mcdi.c \
51 ${MTK_PLAT_SOC}/drivers/spm/spm_suspend.c \
52 ${MTK_PLAT_SOC}/drivers/timer/mt_cpuxgpt.c \
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]53 ${MTK_PLAT_SOC}/plat_pm.c \
54 ${MTK_PLAT_SOC}/plat_sip_calls.c \
55 ${MTK_PLAT_SOC}/plat_topology.c \
56 ${MTK_PLAT_SOC}/power_tracer.c \
57 ${MTK_PLAT_SOC}/scu.c
58
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]59# Enable workarounds for selected Cortex-A53 erratas.
60ERRATA_A53_826319 := 1
61ERRATA_A53_836870 := 1
Andre Przywarabf7f2f02016-11-07 10:53:14 +0000[diff] [blame]62ERRATA_A53_855873 := 1
developer65014b82015-04-13 14:47:57 +0800[diff] [blame]63
64# indicate the reset vector address can be programmed
65PROGRAMMABLE_RESET_ADDRESS := 1
developer14f3fe32016-04-28 14:07:42 +0800[diff] [blame]66
67$(eval $(call add_define,MTK_SIP_SET_AUTHORIZED_SECURE_REG_ENABLE))
David Cunadoc5b0c0f2017-10-31 23:19:21 +0000[diff] [blame]68
69# Do not enable SVE
70ENABLE_SVE_FOR_NS := 0