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Masahiro Yamada574388c2016-09-03 11:37:40 +09001/*
Masahiro Yamadae30ec7f2020-01-17 13:46:38 +09002 * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
Masahiro Yamada574388c2016-09-03 11:37:40 +09003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Masahiro Yamada1a741d92020-02-03 19:46:15 +09007#include <assert.h>
8
Masahiro Yamada574388c2016-09-03 11:37:40 +09009#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <common/debug.h>
12#include <lib/xlat_tables/xlat_tables_v2.h>
Masahiro Yamada574388c2016-09-03 11:37:40 +090013
Masahiro Yamada1a741d92020-02-03 19:46:15 +090014#include "uniphier.h"
15
16struct uniphier_reg_region {
17 uintptr_t base;
18 size_t size;
19};
Masahiro Yamada574388c2016-09-03 11:37:40 +090020
Masahiro Yamada1a741d92020-02-03 19:46:15 +090021static const struct uniphier_reg_region uniphier_reg_region[] = {
22 [UNIPHIER_SOC_LD11] = {
23 .base = 0x50000000UL,
24 .size = 0x20000000UL,
25 },
26 [UNIPHIER_SOC_LD20] = {
27 .base = 0x50000000UL,
28 .size = 0x20000000UL,
29 },
30 [UNIPHIER_SOC_PXS3] = {
31 .base = 0x50000000UL,
32 .size = 0x20000000UL,
33 },
34};
35
36void uniphier_mmap_setup(unsigned int soc)
Masahiro Yamada574388c2016-09-03 11:37:40 +090037{
38 VERBOSE("Trusted RAM seen by this BL image: %p - %p\n",
Masahiro Yamadae30ec7f2020-01-17 13:46:38 +090039 (void *)BL_CODE_BASE, (void *)BL_END);
40 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE,
41 round_up(BL_END, PAGE_SIZE) - BL_CODE_BASE,
Masahiro Yamada574388c2016-09-03 11:37:40 +090042 MT_MEMORY | MT_RW | MT_SECURE);
43
44 /* remap the code section */
45 VERBOSE("Code region: %p - %p\n",
46 (void *)BL_CODE_BASE, (void *)BL_CODE_END);
47 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE,
48 round_up(BL_CODE_END, PAGE_SIZE) - BL_CODE_BASE,
49 MT_CODE | MT_SECURE);
50
51 /* remap the coherent memory region */
52 VERBOSE("Coherent region: %p - %p\n",
53 (void *)BL_COHERENT_RAM_BASE, (void *)BL_COHERENT_RAM_END);
54 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE,
55 BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
56 MT_DEVICE | MT_RW | MT_SECURE);
57
Masahiro Yamada574388c2016-09-03 11:37:40 +090058 /* register region */
Masahiro Yamada1a741d92020-02-03 19:46:15 +090059 assert(soc < ARRAY_SIZE(uniphier_reg_region));
60 mmap_add_region(uniphier_reg_region[soc].base,
61 uniphier_reg_region[soc].base,
62 uniphier_reg_region[soc].size,
Masahiro Yamada574388c2016-09-03 11:37:40 +090063 MT_DEVICE | MT_RW | MT_SECURE);
64
Masahiro Yamada574388c2016-09-03 11:37:40 +090065 init_xlat_tables();
66}