rutigl@gmail.com | defbeed | 2023-03-19 09:19:05 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Copyright (C) 2022-2023 Nuvoton Ltd. |
| 5 | * |
| 6 | * SPDX-License-Identifier: BSD-3-Clause |
| 7 | */ |
| 8 | |
| 9 | #include <arch.h> |
| 10 | #include <arch_helpers.h> |
| 11 | #include <common/debug.h> |
| 12 | #include <lib/psci/psci.h> |
| 13 | #include <lib/semihosting.h> |
| 14 | #include <plat/common/platform.h> |
| 15 | |
| 16 | /* |
| 17 | * Since NPCM845 have only powered/non-powered state, |
| 18 | * the tree is structure of level 0 |
| 19 | * (Single cluster == 0) and 4 representing a "leaf" for every CPU |
| 20 | */ |
| 21 | const unsigned char npcm845x_power_domain_tree_desc[] = { |
| 22 | PLATFORM_CLUSTER_COUNT, |
| 23 | PLATFORM_MAX_CPU_PER_CLUSTER |
| 24 | }; |
| 25 | |
| 26 | const unsigned char *plat_get_power_domain_tree_desc(void) |
| 27 | { |
| 28 | /* A single cluster with 4 CPUs */ |
| 29 | return npcm845x_power_domain_tree_desc; |
| 30 | } |
| 31 | |
| 32 | int plat_core_pos_by_mpidr(u_register_t mpidr) |
| 33 | { |
| 34 | unsigned int cluster_id, cpu_id; |
| 35 | |
| 36 | mpidr &= MPIDR_AFFINITY_MASK; |
| 37 | |
| 38 | if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) { |
| 39 | return -1; |
| 40 | } |
| 41 | |
| 42 | cluster_id = (unsigned int)MPIDR_AFFLVL1_VAL(mpidr); |
| 43 | cpu_id = (unsigned int)MPIDR_AFFLVL0_VAL(mpidr); |
| 44 | |
| 45 | if (cluster_id > PLATFORM_CLUSTER_COUNT || |
| 46 | cpu_id > PLATFORM_MAX_CPU_PER_CLUSTER) { |
| 47 | return -1; |
| 48 | } |
| 49 | |
| 50 | return (int)(cpu_id + (cluster_id * 4)); |
| 51 | } |