blob: 5b98006a3dfc9a3cac9670e73ed6e66ce948ee55 [file] [log] [blame]
Tien Hock, Loh8d9e8912019-10-02 13:49:25 +08001/*
2 * Copyright (c) 2020, Intel Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef SOCFPGA_EMAC_H
8#define SOCFPGA_EMAC_H
9
10/* EMAC PHY Mode */
11
12#define PHY_INTERFACE_MODE_GMII_MII 0
13#define PHY_INTERFACE_MODE_RGMII 1
14#define PHY_INTERFACE_MODE_RMII 2
15#define PHY_INTERFACE_MODE_RESET 3
16
17/* Mask Definitions */
18
19#define PHY_INTF_SEL_MSK 0x3
20#define FPGAINTF_EN_3_EMAC_MSK(x) (1 << (x * 8))
21
22void socfpga_emac_init(void);
23
24#endif /* SOCFPGA_EMAC_H */