| Samuel Holland | b856664 | 2017-08-12 04:07:39 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 7 | #ifndef SUNXI_DEF_H |
| 8 | #define SUNXI_DEF_H |
| Samuel Holland | b856664 | 2017-08-12 04:07:39 -0500 | [diff] [blame] | 9 | |
| 10 | /* Clock configuration */ |
| 11 | #define SUNXI_OSC24M_CLK_IN_HZ 24000000 |
| 12 | |
| 13 | /* UART configuration */ |
| 14 | #define SUNXI_UART0_BAUDRATE 115200 |
| 15 | #define SUNXI_UART0_CLK_IN_HZ SUNXI_OSC24M_CLK_IN_HZ |
| 16 | |
| Andre Przywara | 78dca1f | 2018-09-17 00:03:09 +0100 | [diff] [blame] | 17 | #define SUNXI_SOC_A64 0x1689 |
| 18 | #define SUNXI_SOC_H5 0x1718 |
| 19 | #define SUNXI_SOC_H6 0x1728 |
| Andre Przywara | bafb561 | 2020-11-24 11:07:10 +0000 | [diff] [blame] | 20 | #define SUNXI_SOC_H616 0x1823 |
| Icenowy Zheng | 61da756 | 2021-07-22 09:41:16 +0800 | [diff] [blame] | 21 | #define SUNXI_SOC_R329 0x1851 |
| Andre Przywara | 78dca1f | 2018-09-17 00:03:09 +0100 | [diff] [blame] | 22 | |
| Andre Przywara | 7aff853 | 2023-04-03 21:33:45 +0100 | [diff] [blame] | 23 | #define SUNXI_VER_BITS_MASK 0xffU |
| Andre Przywara | abb7ce1 | 2020-09-25 16:42:06 +0100 | [diff] [blame] | 24 | #define JEDEC_ALLWINNER_BKID 9U |
| 25 | #define JEDEC_ALLWINNER_MFID 0x9eU |
| 26 | |
| Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 27 | #endif /* SUNXI_DEF_H */ |