Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <plat_arm.h> |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 8 | |
| 9 | /* Topology */ |
| 10 | /* |
| 11 | * The power domain tree descriptor. The cluster power domains are |
| 12 | * arranged so that when the PSCI generic code creates the power domain tree, |
| 13 | * the indices of the CPU power domain nodes it allocates match the linear |
| 14 | * indices returned by plat_core_pos_by_mpidr(). |
| 15 | */ |
| 16 | const unsigned char sgi_pd_tree_desc[] = { |
| 17 | PLAT_ARM_CLUSTER_COUNT, |
Vishwanatha HG | 64f0b6f | 2018-05-08 17:15:37 +0530 | [diff] [blame] | 18 | CSS_SGI_MAX_CPUS_PER_CLUSTER, |
| 19 | CSS_SGI_MAX_CPUS_PER_CLUSTER |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 20 | }; |
| 21 | |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 22 | /******************************************************************************* |
| 23 | * This function returns the topology tree information. |
| 24 | ******************************************************************************/ |
| 25 | const unsigned char *plat_get_power_domain_tree_desc(void) |
| 26 | { |
Chandni Cherukuri | a5d44ec | 2018-08-14 15:25:34 +0530 | [diff] [blame] | 27 | return sgi_pd_tree_desc; |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 28 | } |
| 29 | |
| 30 | /******************************************************************************* |
| 31 | * This function returns the core count within the cluster corresponding to |
| 32 | * `mpidr`. |
| 33 | ******************************************************************************/ |
| 34 | unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr) |
| 35 | { |
Chandni Cherukuri | a5d44ec | 2018-08-14 15:25:34 +0530 | [diff] [blame] | 36 | return CSS_SGI_MAX_CPUS_PER_CLUSTER; |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 37 | } |
Chandni Cherukuri | d61a705 | 2018-08-01 15:58:48 +0530 | [diff] [blame] | 38 | |
| 39 | /******************************************************************************* |
| 40 | * The array mapping platform core position (implemented by plat_my_core_pos()) |
| 41 | * to the SCMI power domain ID implemented by SCP. |
| 42 | ******************************************************************************/ |
| 43 | const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[32] = { |
| 44 | 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \ |
| 45 | 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 |
| 46 | }; |
Chandni Cherukuri | 449db45 | 2018-08-16 13:45:17 +0530 | [diff] [blame] | 47 | |
| 48 | /****************************************************************************** |
| 49 | * Return the number of PE's supported by the CPU. |
| 50 | *****************************************************************************/ |
| 51 | unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr) |
| 52 | { |
| 53 | return CSS_SGI_MAX_PE_PER_CPU; |
| 54 | } |