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Dimitris Papastamos0b00f8a2018-02-14 10:00:06 +00001/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <cpuamu.h>
10
11 .globl cpuamu_cnt_read
12 .globl cpuamu_cnt_write
13 .globl cpuamu_read_cpuamcntenset_el0
14 .globl cpuamu_read_cpuamcntenclr_el0
15 .globl cpuamu_write_cpuamcntenset_el0
16 .globl cpuamu_write_cpuamcntenclr_el0
17
18/*
Antonio Nino Diaz033b4bb2018-10-25 16:52:26 +010019 * uint64_t cpuamu_cnt_read(unsigned int idx);
Dimitris Papastamos0b00f8a2018-02-14 10:00:06 +000020 *
21 * Given `idx`, read the corresponding AMU counter
22 * and return it in `x0`.
23 */
24func cpuamu_cnt_read
25 adr x1, 1f
26 lsl x0, x0, #3
27 add x1, x1, x0
28 br x1
29
301:
31 mrs x0, CPUAMEVCNTR0_EL0
32 ret
33 mrs x0, CPUAMEVCNTR1_EL0
34 ret
35 mrs x0, CPUAMEVCNTR2_EL0
36 ret
37 mrs x0, CPUAMEVCNTR3_EL0
38 ret
39 mrs x0, CPUAMEVCNTR4_EL0
40 ret
41endfunc cpuamu_cnt_read
42
43/*
Antonio Nino Diaz033b4bb2018-10-25 16:52:26 +010044 * void cpuamu_cnt_write(unsigned int idx, uint64_t val);
Dimitris Papastamos0b00f8a2018-02-14 10:00:06 +000045 *
46 * Given `idx`, write `val` to the corresponding AMU counter.
47 */
48func cpuamu_cnt_write
49 adr x2, 1f
50 lsl x0, x0, #3
51 add x2, x2, x0
52 br x2
53
541:
55 msr CPUAMEVCNTR0_EL0, x0
56 ret
57 msr CPUAMEVCNTR1_EL0, x0
58 ret
59 msr CPUAMEVCNTR2_EL0, x0
60 ret
61 msr CPUAMEVCNTR3_EL0, x0
62 ret
63 msr CPUAMEVCNTR4_EL0, x0
64 ret
65endfunc cpuamu_cnt_write
66
67/*
68 * unsigned int cpuamu_read_cpuamcntenset_el0(void);
69 *
70 * Read the `CPUAMCNTENSET_EL0` CPU register and return
71 * it in `x0`.
72 */
73func cpuamu_read_cpuamcntenset_el0
74 mrs x0, CPUAMCNTENSET_EL0
75 ret
76endfunc cpuamu_read_cpuamcntenset_el0
77
78/*
79 * unsigned int cpuamu_read_cpuamcntenclr_el0(void);
80 *
81 * Read the `CPUAMCNTENCLR_EL0` CPU register and return
82 * it in `x0`.
83 */
84func cpuamu_read_cpuamcntenclr_el0
85 mrs x0, CPUAMCNTENCLR_EL0
86 ret
87endfunc cpuamu_read_cpuamcntenclr_el0
88
89/*
90 * void cpuamu_write_cpuamcntenset_el0(unsigned int mask);
91 *
92 * Write `mask` to the `CPUAMCNTENSET_EL0` CPU register.
93 */
94func cpuamu_write_cpuamcntenset_el0
95 msr CPUAMCNTENSET_EL0, x0
96 ret
97endfunc cpuamu_write_cpuamcntenset_el0
98
99/*
100 * void cpuamu_write_cpuamcntenclr_el0(unsigned int mask);
101 *
102 * Write `mask` to the `CPUAMCNTENCLR_EL0` CPU register.
103 */
104func cpuamu_write_cpuamcntenclr_el0
105 msr CPUAMCNTENCLR_EL0, x0
106 ret
107endfunc cpuamu_write_cpuamcntenclr_el0