| Jorge Ramirez-Ortiz | bf084dc | 2018-09-23 09:36:13 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <cci.h> |
| 8 | #include <gic_common.h> |
| 9 | #include <gicv2.h> |
| 10 | #include "rcar_def.h" |
| 11 | |
| 12 | .section .rodata.gic_reg_name, "aS" |
| 13 | gicc_regs: |
| 14 | .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", "" |
| 15 | gicd_pend_reg: |
| 16 | .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n" |
| 17 | newline: |
| 18 | .asciz "\n" |
| 19 | spacer: |
| 20 | .asciz ":\t\t0x" |
| 21 | |
| 22 | /* --------------------------------------------- |
| 23 | * The below macro prints out relevant GIC |
| 24 | * registers whenever an unhandled exception is |
| 25 | * taken in BL3-1. |
| 26 | * Clobbers: x0 - x10, x16, x17, sp |
| 27 | * --------------------------------------------- |
| 28 | */ |
| 29 | .macro plat_print_gic_regs |
| 30 | mov_imm x17, RCAR_GICC_BASE |
| 31 | mov_imm x16, RCAR_GICD_BASE |
| 32 | print_gicc_regs: |
| 33 | /* gicc base address is now in x17 */ |
| 34 | adr x6, gicc_regs /* Load the gicc reg list to x6 */ |
| 35 | /* Load the gicc regs to gp regs used by str_in_crash_buf_print */ |
| 36 | ldr w8, [x17, #GICC_HPPIR] |
| 37 | ldr w9, [x17, #GICC_AHPPIR] |
| 38 | ldr w10, [x17, #GICC_CTLR] |
| 39 | /* Store to the crash buf and print to console */ |
| 40 | bl str_in_crash_buf_print |
| 41 | |
| 42 | /* Print the GICD_ISPENDR regs */ |
| 43 | add x7, x16, #GICD_ISPENDR |
| 44 | adr x4, gicd_pend_reg |
| 45 | bl asm_print_str |
| 46 | gicd_ispendr_loop: |
| 47 | sub x4, x7, x16 |
| 48 | cmp x4, #0x280 |
| 49 | b.eq exit_print_gic_regs |
| 50 | bl asm_print_hex |
| 51 | adr x4, spacer |
| 52 | bl asm_print_str |
| 53 | ldr x4, [x7], #8 |
| 54 | bl asm_print_hex |
| 55 | adr x4, newline |
| 56 | bl asm_print_str |
| 57 | b gicd_ispendr_loop |
| 58 | exit_print_gic_regs: |
| 59 | .endm |
| 60 | |
| 61 | .section .rodata.cci_reg_name, "aS" |
| 62 | cci_iface_regs: |
| 63 | .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , "" |
| 64 | |
| 65 | /* ------------------------------------------------ |
| 66 | * The below macro prints out relevant interconnect |
| 67 | * registers whenever an unhandled exception is |
| 68 | * taken in BL3-1. |
| 69 | * Clobbers: x0 - x9, sp |
| 70 | * ------------------------------------------------ |
| 71 | */ |
| 72 | .macro plat_print_interconnect_regs |
| 73 | adr x6, cci_iface_regs |
| 74 | /* Store in x7 the base address of the first interface */ |
| 75 | mov_imm x7, (CCI500_BASE + SLAVE_IFACE3_OFFSET) |
| 76 | ldr w8, [x7, #SNOOP_CTRL_REG] |
| 77 | /* Store in x7 the base address of the second interface */ |
| 78 | mov_imm x7, (CCI500_BASE + SLAVE_IFACE4_OFFSET) |
| 79 | ldr w9, [x7, #SNOOP_CTRL_REG] |
| 80 | /* Store to the crash buf and print to console */ |
| 81 | bl str_in_crash_buf_print |
| 82 | .endm |
| 83 | |
| 84 | .macro plat_crash_print_regs |
| 85 | plat_print_gic_regs |
| 86 | plat_print_interconnect_regs |
| 87 | .endm |