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Joel Hutton9463cae2018-05-04 15:09:47 +01001/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef CORTEX_DEIMOS_H
8#define CORTEX_DEIMOS_H
Joel Hutton9463cae2018-05-04 15:09:47 +01009
10#define CORTEX_DEIMOS_MIDR U(0x410FD0D0)
11
12/*******************************************************************************
13 * CPU Extended Control register specific definitions.
14 ******************************************************************************/
15#define CORTEX_DEIMOS_CPUECTLR_EL1 S3_0_C15_C1_4
16
17/*******************************************************************************
18 * CPU Power Control register specific definitions.
19 ******************************************************************************/
20#define CORTEX_DEIMOS_CPUPWRCTLR_EL1 S3_0_C15_C2_7
21#define CORTEX_DEIMOS_CPUPWRCTLR_EL1_CORE_PWRDN_BIT (U(1) << 0)
22
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000023#endif /* CORTEX_DEIMOS_H */