| developer | b7f3f13 | 2024-10-21 14:22:19 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2024, Mediatek Inc. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include <assert_macros.S> |
| 10 | #include <cpu_macros.S> |
| 11 | #include <platform_def.h> |
| 12 | #if CONFIG_MTK_MCUSYS |
| 13 | #include <mcucfg.h> |
| 14 | #endif |
| 15 | |
| 16 | /* |
| 17 | * Declare as weak function so that can be |
| 18 | * overwritten by platform helpers |
| 19 | */ |
| 20 | .weak platform_mem_init |
| 21 | .weak plat_core_pos_by_mpidr |
| 22 | .weak plat_my_core_pos |
| 23 | .weak plat_mediatek_calc_core_pos |
| 24 | .global plat_mpidr_by_core_pos |
| 25 | .global plat_reset_handler |
| 26 | |
| 27 | /* ----------------------------------------------------- |
| 28 | * unsigned long plat_mpidr_by_core_pos(uint32_t cpuid) |
| 29 | * This function calcuate mpidr by cpu pos if cpu |
| 30 | * topology is linear. |
| 31 | * |
| 32 | * Clobbers: x0-x1 |
| 33 | * ----------------------------------------------------- |
| 34 | */ |
| 35 | func plat_mpidr_by_core_pos |
| 36 | lsl x0, x0, #MPIDR_AFF1_SHIFT |
| 37 | mrs x1, mpidr_el1 |
| 38 | and x1, x1, #MPIDR_MT_MASK |
| 39 | orr x0, x0, x1 |
| 40 | ret |
| 41 | endfunc plat_mpidr_by_core_pos |
| 42 | |
| 43 | /* ----------------------------------------------------- |
| 44 | * unsigned int plat_my_core_pos(void) |
| 45 | * This function uses the plat_arm_calc_core_pos() |
| 46 | * definition to get the index of the calling CPU. |
| 47 | * ----------------------------------------------------- |
| 48 | */ |
| 49 | func plat_my_core_pos |
| 50 | mrs x0, mpidr_el1 |
| 51 | b plat_mediatek_calc_core_pos |
| 52 | endfunc plat_my_core_pos |
| 53 | |
| 54 | /* ----------------------------------------------------- |
| 55 | * int plat_mediatek_calc_core_pos(u_register_t mpidr); |
| 56 | * |
| 57 | * In ARMv8.2, AFF2 is cluster id, AFF1 is core id and |
| 58 | * AFF0 is thread id. There is only one cluster in ARMv8.2 |
| 59 | * and one thread in current implementation. |
| 60 | * |
| 61 | * With this function: CorePos = CoreID (AFF1) |
| 62 | * we do it with x0 = (x0 >> 8) & 0xff |
| 63 | * ----------------------------------------------------- |
| 64 | */ |
| 65 | func plat_mediatek_calc_core_pos |
| 66 | b plat_core_pos_by_mpidr |
| 67 | endfunc plat_mediatek_calc_core_pos |
| 68 | |
| 69 | /* ------------------------------------------------------ |
| 70 | * int32_t plat_core_pos_by_mpidr(u_register_t mpidr) |
| 71 | * |
| 72 | * This function implements a part of the critical |
| 73 | * interface between the psci generic layer and the |
| 74 | * platform that allows the former to query the platform |
| 75 | * to convert an MPIDR to a unique linear index. |
| 76 | * |
| 77 | * Clobbers: x0-x1 |
| 78 | * ------------------------------------------------------ |
| 79 | */ |
| 80 | func plat_core_pos_by_mpidr |
| 81 | mov x1, #MPIDR_AFFLVL_MASK |
| 82 | and x0, x1, x0, lsr #MPIDR_AFF1_SHIFT |
| 83 | ret |
| 84 | endfunc plat_core_pos_by_mpidr |
| 85 | |
| 86 | /* -------------------------------------------------------- |
| 87 | * void platform_mem_init (void); |
| 88 | * |
| 89 | * Any memory init, relocation to be done before the |
| 90 | * platform boots. Called very early in the boot process. |
| 91 | * -------------------------------------------------------- |
| 92 | */ |
| 93 | func platform_mem_init |
| 94 | ret |
| 95 | endfunc platform_mem_init |
| 96 | |
| 97 | func plat_reset_handler |
| 98 | #if CONFIG_MTK_MCUSYS |
| 99 | mov x10, x30 |
| 100 | bl plat_my_core_pos |
| 101 | mov x30, x10 |
| 102 | mov w1, #0x1 |
| 103 | lsl w1, w1, w0 |
| 104 | ldr x0, =CPC_MCUSYS_CPU_ON_SW_HINT_SET |
| 105 | str w1, [x0] |
| 106 | dsb sy |
| 107 | #endif |
| 108 | |
| 109 | ret |
| 110 | endfunc plat_reset_handler |