blob: 19baf21d67535eb809a2707fb4c775f22530345b [file] [log] [blame]
Jens Wiklander52c798e2015-12-07 14:37:10 +01001/*
2 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Jens Wiklander52c798e2015-12-07 14:37:10 +01005 */
6
7#include <assert.h>
8#include <bl_common.h> /* For ARRAY_SIZE */
9#include <debug.h>
10#include <firmware_image_package.h>
11#include <io_driver.h>
12#include <io_fip.h>
13#include <io_memmap.h>
14#include <io_semihosting.h>
15#include <io_storage.h>
16#include <platform_def.h>
17#include <semihosting.h>
18#include <string.h>
19
20/* Semihosting filenames */
21#define BL2_IMAGE_NAME "bl2.bin"
22#define BL31_IMAGE_NAME "bl31.bin"
23#define BL32_IMAGE_NAME "bl32.bin"
24#define BL33_IMAGE_NAME "bl33.bin"
25
26#if TRUSTED_BOARD_BOOT
27#define BL2_CERT_NAME "bl2.crt"
28#define TRUSTED_KEY_CERT_NAME "trusted_key.crt"
29#define BL31_KEY_CERT_NAME "bl31_key.crt"
30#define BL32_KEY_CERT_NAME "bl32_key.crt"
31#define BL33_KEY_CERT_NAME "bl33_key.crt"
32#define BL31_CERT_NAME "bl31.crt"
33#define BL32_CERT_NAME "bl32.crt"
34#define BL33_CERT_NAME "bl33.crt"
35#endif /* TRUSTED_BOARD_BOOT */
36
37
38
39/* IO devices */
40static const io_dev_connector_t *fip_dev_con;
41static uintptr_t fip_dev_handle;
42static const io_dev_connector_t *memmap_dev_con;
43static uintptr_t memmap_dev_handle;
44static const io_dev_connector_t *sh_dev_con;
45static uintptr_t sh_dev_handle;
46
47static const io_block_spec_t fip_block_spec = {
48 .offset = PLAT_QEMU_FIP_BASE,
49 .length = PLAT_QEMU_FIP_MAX_SIZE
50};
51
52static const io_uuid_spec_t bl2_uuid_spec = {
53 .uuid = UUID_TRUSTED_BOOT_FIRMWARE_BL2,
54};
55
56static const io_uuid_spec_t bl31_uuid_spec = {
57 .uuid = UUID_EL3_RUNTIME_FIRMWARE_BL31,
58};
59
60static const io_uuid_spec_t bl32_uuid_spec = {
61 .uuid = UUID_SECURE_PAYLOAD_BL32,
62};
63
64static const io_uuid_spec_t bl33_uuid_spec = {
65 .uuid = UUID_NON_TRUSTED_FIRMWARE_BL33,
66};
67
68#if TRUSTED_BOARD_BOOT
69static const io_uuid_spec_t bl2_cert_uuid_spec = {
70 .uuid = UUID_TRUSTED_BOOT_FIRMWARE_BL2_CERT,
71};
72
73static const io_uuid_spec_t trusted_key_cert_uuid_spec = {
74 .uuid = UUID_TRUSTED_KEY_CERT,
75};
76
77static const io_uuid_spec_t bl31_key_cert_uuid_spec = {
78 .uuid = UUID_EL3_RUNTIME_FIRMWARE_BL31_KEY_CERT,
79};
80
81static const io_uuid_spec_t bl32_key_cert_uuid_spec = {
82 .uuid = UUID_SECURE_PAYLOAD_BL32_KEY_CERT,
83};
84
85static const io_uuid_spec_t bl33_key_cert_uuid_spec = {
86 .uuid = UUID_NON_TRUSTED_FIRMWARE_BL33_KEY_CERT,
87};
88
89static const io_uuid_spec_t bl31_cert_uuid_spec = {
90 .uuid = UUID_EL3_RUNTIME_FIRMWARE_BL31_CERT,
91};
92
93static const io_uuid_spec_t bl32_cert_uuid_spec = {
94 .uuid = UUID_SECURE_PAYLOAD_BL32_CERT,
95};
96
97static const io_uuid_spec_t bl33_cert_uuid_spec = {
98 .uuid = UUID_NON_TRUSTED_FIRMWARE_BL33_CERT,
99};
100#endif /* TRUSTED_BOARD_BOOT */
101
102static const io_file_spec_t sh_file_spec[] = {
103 [BL2_IMAGE_ID] = {
104 .path = BL2_IMAGE_NAME,
105 .mode = FOPEN_MODE_RB
106 },
107 [BL31_IMAGE_ID] = {
108 .path = BL31_IMAGE_NAME,
109 .mode = FOPEN_MODE_RB
110 },
111 [BL32_IMAGE_ID] = {
112 .path = BL32_IMAGE_NAME,
113 .mode = FOPEN_MODE_RB
114 },
115 [BL33_IMAGE_ID] = {
116 .path = BL33_IMAGE_NAME,
117 .mode = FOPEN_MODE_RB
118 },
119#if TRUSTED_BOARD_BOOT
120 [BL2_CERT_ID] = {
121 .path = BL2_CERT_NAME,
122 .mode = FOPEN_MODE_RB
123 },
124 [TRUSTED_KEY_CERT_ID] = {
125 .path = TRUSTED_KEY_CERT_NAME,
126 .mode = FOPEN_MODE_RB
127 },
128 [BL31_KEY_CERT_ID] = {
129 .path = BL31_KEY_CERT_NAME,
130 .mode = FOPEN_MODE_RB
131 },
132 [BL32_KEY_CERT_ID] = {
133 .path = BL32_KEY_CERT_NAME,
134 .mode = FOPEN_MODE_RB
135 },
136 [BL33_KEY_CERT_ID] = {
137 .path = BL33_KEY_CERT_NAME,
138 .mode = FOPEN_MODE_RB
139 },
140 [BL31_CERT_ID] = {
141 .path = BL31_CERT_NAME,
142 .mode = FOPEN_MODE_RB
143 },
144 [BL32_CERT_ID] = {
145 .path = BL32_CERT_NAME,
146 .mode = FOPEN_MODE_RB
147 },
148 [BL33_CERT_ID] = {
149 .path = BL33_CERT_NAME,
150 .mode = FOPEN_MODE_RB
151 },
152#endif /* TRUSTED_BOARD_BOOT */
153};
154
155
156
157static int open_fip(const uintptr_t spec);
158static int open_memmap(const uintptr_t spec);
159
160struct plat_io_policy {
161 uintptr_t *dev_handle;
162 uintptr_t image_spec;
163 int (*check)(const uintptr_t spec);
164};
165
166/* By default, ARM platforms load images from the FIP */
167static const struct plat_io_policy policies[] = {
168 [FIP_IMAGE_ID] = {
169 &memmap_dev_handle,
170 (uintptr_t)&fip_block_spec,
171 open_memmap
172 },
173 [BL2_IMAGE_ID] = {
174 &fip_dev_handle,
175 (uintptr_t)&bl2_uuid_spec,
176 open_fip
177 },
178 [BL31_IMAGE_ID] = {
179 &fip_dev_handle,
180 (uintptr_t)&bl31_uuid_spec,
181 open_fip
182 },
183 [BL32_IMAGE_ID] = {
184 &fip_dev_handle,
185 (uintptr_t)&bl32_uuid_spec,
186 open_fip
187 },
188 [BL33_IMAGE_ID] = {
189 &fip_dev_handle,
190 (uintptr_t)&bl33_uuid_spec,
191 open_fip
192 },
193#if TRUSTED_BOARD_BOOT
194 [BL2_CERT_ID] = {
195 &fip_dev_handle,
196 (uintptr_t)&bl2_cert_uuid_spec,
197 open_fip
198 },
199 [TRUSTED_KEY_CERT_ID] = {
200 &fip_dev_handle,
201 (uintptr_t)&trusted_key_cert_uuid_spec,
202 open_fip
203 },
204 [BL31_KEY_CERT_ID] = {
205 &fip_dev_handle,
206 (uintptr_t)&bl31_key_cert_uuid_spec,
207 open_fip
208 },
209 [BL32_KEY_CERT_ID] = {
210 &fip_dev_handle,
211 (uintptr_t)&bl32_key_cert_uuid_spec,
212 open_fip
213 },
214 [BL33_KEY_CERT_ID] = {
215 &fip_dev_handle,
216 (uintptr_t)&bl33_key_cert_uuid_spec,
217 open_fip
218 },
219 [BL31_CERT_ID] = {
220 &fip_dev_handle,
221 (uintptr_t)&bl31_cert_uuid_spec,
222 open_fip
223 },
224 [BL32_CERT_ID] = {
225 &fip_dev_handle,
226 (uintptr_t)&bl32_cert_uuid_spec,
227 open_fip
228 },
229 [BL33_CERT_ID] = {
230 &fip_dev_handle,
231 (uintptr_t)&bl33_cert_uuid_spec,
232 open_fip
233 },
234#endif /* TRUSTED_BOARD_BOOT */
235};
236
237static int open_fip(const uintptr_t spec)
238{
239 int result;
240 uintptr_t local_image_handle;
241
242 /* See if a Firmware Image Package is available */
243 result = io_dev_init(fip_dev_handle, (uintptr_t)FIP_IMAGE_ID);
244 if (result == 0) {
245 result = io_open(fip_dev_handle, spec, &local_image_handle);
246 if (result == 0) {
247 VERBOSE("Using FIP\n");
248 io_close(local_image_handle);
249 }
250 }
251 return result;
252}
253
254static int open_memmap(const uintptr_t spec)
255{
256 int result;
257 uintptr_t local_image_handle;
258
259 result = io_dev_init(memmap_dev_handle, (uintptr_t)NULL);
260 if (result == 0) {
261 result = io_open(memmap_dev_handle, spec, &local_image_handle);
262 if (result == 0) {
263 VERBOSE("Using Memmap\n");
264 io_close(local_image_handle);
265 }
266 }
267 return result;
268}
269
270static int open_semihosting(const uintptr_t spec)
271{
272 int result;
273 uintptr_t local_image_handle;
274
275 /* See if the file exists on semi-hosting.*/
276 result = io_dev_init(sh_dev_handle, (uintptr_t)NULL);
277 if (result == 0) {
278 result = io_open(sh_dev_handle, spec, &local_image_handle);
279 if (result == 0) {
280 VERBOSE("Using Semi-hosting IO\n");
281 io_close(local_image_handle);
282 }
283 }
284 return result;
285}
286
287void plat_qemu_io_setup(void)
288{
289 int io_result;
290
291 io_result = register_io_dev_fip(&fip_dev_con);
292 assert(io_result == 0);
293
294 io_result = register_io_dev_memmap(&memmap_dev_con);
295 assert(io_result == 0);
296
297 /* Open connections to devices and cache the handles */
298 io_result = io_dev_open(fip_dev_con, (uintptr_t)NULL,
299 &fip_dev_handle);
300 assert(io_result == 0);
301
302 io_result = io_dev_open(memmap_dev_con, (uintptr_t)NULL,
303 &memmap_dev_handle);
304 assert(io_result == 0);
305
306 /* Register the additional IO devices on this platform */
307 io_result = register_io_dev_sh(&sh_dev_con);
308 assert(io_result == 0);
309
310 /* Open connections to devices and cache the handles */
311 io_result = io_dev_open(sh_dev_con, (uintptr_t)NULL, &sh_dev_handle);
312 assert(io_result == 0);
313
314 /* Ignore improbable errors in release builds */
315 (void)io_result;
316}
317
318static int get_alt_image_source(unsigned int image_id, uintptr_t *dev_handle,
319 uintptr_t *image_spec)
320{
321 int result = open_semihosting((const uintptr_t)&sh_file_spec[image_id]);
322
323 if (result == 0) {
324 *dev_handle = sh_dev_handle;
325 *image_spec = (uintptr_t)&sh_file_spec[image_id];
326 }
327
328 return result;
329}
330
331/*
332 * Return an IO device handle and specification which can be used to access
333 * an image. Use this to enforce platform load policy
334 */
335int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
336 uintptr_t *image_spec)
337{
338 int result;
339 const struct plat_io_policy *policy;
340
341 assert(image_id < ARRAY_SIZE(policies));
342
343 policy = &policies[image_id];
344 result = policy->check(policy->image_spec);
345 if (result == 0) {
346 *image_spec = policy->image_spec;
347 *dev_handle = *(policy->dev_handle);
348 } else {
349 VERBOSE("Trying alternative IO\n");
350 result = get_alt_image_source(image_id, dev_handle, image_spec);
351 }
352
353 return result;
354}