developer | 1033ea1 | 2019-04-10 21:09:26 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <assert.h> |
| 9 | #include <common/debug.h> |
| 10 | #include <lib/mmio.h> |
| 11 | #include <mcucfg.h> |
| 12 | #include <stdio.h> |
| 13 | #include <stdlib.h> |
| 14 | #include <string.h> |
| 15 | |
| 16 | void disable_scu(u_register_t mpidr) |
| 17 | { |
| 18 | uintptr_t axi_config = 0; |
| 19 | uint32_t axi_value; |
| 20 | |
| 21 | switch (mpidr & MPIDR_CLUSTER_MASK) { |
| 22 | case 0x000: |
| 23 | axi_config = (uintptr_t)&mt8183_mcucfg->mp0_axi_config; |
| 24 | axi_value = MP0_ACINACTM; |
| 25 | break; |
| 26 | case 0x100: |
| 27 | axi_config = (uintptr_t)&mt8183_mcucfg->mp2_axi_config; |
| 28 | axi_value = MP2_ACINACTM; |
| 29 | break; |
| 30 | default: |
| 31 | ERROR("%s: mpidr does not exist\n", __func__); |
| 32 | panic(); |
| 33 | } |
| 34 | mmio_setbits_32(axi_config, axi_value); |
| 35 | } |
| 36 | |
| 37 | void enable_scu(u_register_t mpidr) |
| 38 | { |
| 39 | uintptr_t axi_config = 0; |
| 40 | uint32_t axi_value; |
| 41 | |
| 42 | switch (mpidr & MPIDR_CLUSTER_MASK) { |
| 43 | case 0x000: |
| 44 | axi_config = (uintptr_t)&mt8183_mcucfg->mp0_axi_config; |
| 45 | axi_value = MP0_ACINACTM; |
| 46 | break; |
| 47 | case 0x100: |
| 48 | axi_config = (uintptr_t)&mt8183_mcucfg->mp2_axi_config; |
| 49 | axi_value = MP2_ACINACTM; |
| 50 | break; |
| 51 | default: |
| 52 | ERROR("%s: mpidr does not exist\n", __func__); |
| 53 | panic(); |
| 54 | } |
| 55 | mmio_clrbits_32(axi_config, axi_value); |
| 56 | } |