blob: 5e14d17fa27f0cfb5a28002f09a95e600f30c539 [file] [log] [blame]
Anson Huang4c28fc32018-06-05 16:12:27 +08001/*
2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <arch_helpers.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00009#include <plat/common/platform.h>
Anson Huang4c28fc32018-06-05 16:12:27 +080010
11const unsigned char imx_power_domain_tree_desc[] = {
12 PWR_DOMAIN_AT_MAX_LVL,
13 PLATFORM_CLUSTER_COUNT,
Anson Huange25ab612018-07-12 14:30:52 +080014 PLATFORM_CLUSTER0_CORE_COUNT,
15 PLATFORM_CLUSTER1_CORE_COUNT,
Anson Huang4c28fc32018-06-05 16:12:27 +080016};
17
18const unsigned char *plat_get_power_domain_tree_desc(void)
19{
20 return imx_power_domain_tree_desc;
21}
22
23int plat_core_pos_by_mpidr(u_register_t mpidr)
24{
25 unsigned int cluster_id, cpu_id;
26
27 mpidr &= MPIDR_AFFINITY_MASK;
28
29 if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK))
30 return -1;
31
32 cluster_id = MPIDR_AFFLVL1_VAL(mpidr);
33 cpu_id = MPIDR_AFFLVL0_VAL(mpidr);
34
35 if (cluster_id > PLATFORM_CLUSTER_COUNT ||
36 cpu_id > PLATFORM_MAX_CPU_PER_CLUSTER)
37 return -1;
38
39 return (cpu_id + (cluster_id * 4));
40}