blob: 664a742c611712b715ed3c76dabeae1e382942e1 [file] [log] [blame]
Jeremy Linton90cbf522020-11-18 10:12:41 -06001/*
2 * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef PCI_SVC_H
8#define PCI_SVC_H
9
10#include <lib/utils_def.h>
11
12/* SMCCC PCI platform functions */
13#define SMC_PCI_VERSION U(0x84000130)
14#define SMC_PCI_FEATURES U(0x84000131)
15#define SMC_PCI_READ U(0x84000132)
16#define SMC_PCI_WRITE U(0x84000133)
17#define SMC_PCI_SEG_INFO U(0x84000134)
18
19#define is_pci_fid(_fid) (((_fid) >= SMC_PCI_VERSION) && \
20 ((_fid) <= SMC_PCI_SEG_INFO))
21
22uint64_t pci_smc_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2,
23 u_register_t x3, u_register_t x4, void *cookie,
24 void *handle, u_register_t flags);
25
26#define PCI_ADDR_FUN(dev) ((dev) & U(0x7))
27#define PCI_ADDR_DEV(dev) (((dev) >> U(3)) & U(0x001F))
28#define PCI_ADDR_BUS(dev) (((dev) >> U(8)) & U(0x00FF))
29#define PCI_ADDR_SEG(dev) (((dev) >> U(16)) & U(0xFFFF))
30#define PCI_OFFSET_MASK U(0xFFF)
31typedef union {
32 struct {
33 uint16_t minor;
34 uint16_t major;
35 } __packed;
36 uint32_t val;
37} pcie_version;
38
39/*
40 * platforms are responsible for providing implementations of these
41 * three functions in a manner which conforms to the Arm PCI Configuration
42 * Space Access Firmware Interface (DEN0115) and the PCIe specification's
43 * sections on PCI configuration access. See the rpi4_pci_svc.c example.
44 */
45uint32_t pci_read_config(uint32_t addr, uint32_t off, uint32_t sz, uint32_t *val);
46uint32_t pci_write_config(uint32_t addr, uint32_t off, uint32_t sz, uint32_t val);
47uint32_t pci_get_bus_for_seg(uint32_t seg, uint32_t *bus_range, uint32_t *nseg);
48
49/* Return codes for Arm PCI Config Space Access Firmware SMC calls */
50#define SMC_PCI_CALL_SUCCESS U(0)
51#define SMC_PCI_CALL_NOT_SUPPORTED -1
52#define SMC_PCI_CALL_INVAL_PARAM -2
53#define SMC_PCI_CALL_NOT_IMPL -3
54
55#define SMC_PCI_SZ_8BIT U(1)
56#define SMC_PCI_SZ_16BIT U(2)
57#define SMC_PCI_SZ_32BIT U(4)
58
59#endif /* PCI_SVC_H */