Yann Gautier | f790702 | 2021-09-08 17:14:21 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
| 2 | /* |
| 3 | * Copyright (C) STMicroelectronics 2022 - All Rights Reserved |
| 4 | * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics. |
| 5 | */ |
| 6 | |
| 7 | /dts-v1/; |
| 8 | |
| 9 | #include <dt-bindings/clock/stm32mp13-clksrc.h> |
| 10 | #include "stm32mp135.dtsi" |
| 11 | #include "stm32mp13xf.dtsi" |
| 12 | #include "stm32mp13-ddr3-1x4Gb-1066-binF.dtsi" |
| 13 | #include "stm32mp13-pinctrl.dtsi" |
| 14 | |
| 15 | / { |
| 16 | model = "STMicroelectronics STM32MP135F-DK Discovery Board"; |
| 17 | compatible = "st,stm32mp135f-dk", "st,stm32mp135"; |
| 18 | |
| 19 | aliases { |
| 20 | serial0 = &uart4; |
| 21 | serial1 = &usart1; |
| 22 | serial2 = &uart8; |
| 23 | serial3 = &usart2; |
| 24 | }; |
| 25 | |
| 26 | chosen { |
| 27 | stdout-path = "serial0:115200n8"; |
| 28 | }; |
| 29 | |
| 30 | memory@c0000000 { |
| 31 | device_type = "memory"; |
| 32 | reg = <0xc0000000 0x20000000>; |
| 33 | }; |
| 34 | |
| 35 | vin: vin { |
| 36 | compatible = "regulator-fixed"; |
| 37 | regulator-name = "vin"; |
| 38 | regulator-min-microvolt = <5000000>; |
| 39 | regulator-max-microvolt = <5000000>; |
| 40 | regulator-always-on; |
| 41 | }; |
| 42 | |
| 43 | v3v3_ao: v3v3_ao { |
| 44 | compatible = "regulator-fixed"; |
| 45 | regulator-name = "v3v3_ao"; |
| 46 | regulator-min-microvolt = <3300000>; |
| 47 | regulator-max-microvolt = <3300000>; |
| 48 | regulator-always-on; |
| 49 | }; |
| 50 | }; |
| 51 | |
| 52 | &bsec { |
| 53 | board_id: board_id@f0 { |
| 54 | reg = <0xf0 0x4>; |
| 55 | st,non-secure-otp; |
| 56 | }; |
| 57 | }; |
| 58 | |
| 59 | &cpu0 { |
| 60 | cpu-supply = <&vddcpu>; |
| 61 | }; |
| 62 | |
| 63 | &hash { |
| 64 | status = "okay"; |
| 65 | }; |
| 66 | |
| 67 | &i2c4 { |
| 68 | pinctrl-names = "default"; |
| 69 | pinctrl-0 = <&i2c4_pins_a>; |
| 70 | i2c-scl-rising-time-ns = <185>; |
| 71 | i2c-scl-falling-time-ns = <20>; |
| 72 | clock-frequency = <400000>; |
| 73 | status = "disabled"; |
| 74 | secure-status = "okay"; |
| 75 | |
| 76 | pmic: stpmic@33 { |
| 77 | compatible = "st,stpmic1"; |
| 78 | reg = <0x33>; |
| 79 | |
| 80 | status = "disabled"; |
| 81 | secure-status = "okay"; |
| 82 | |
| 83 | regulators { |
| 84 | compatible = "st,stpmic1-regulators"; |
| 85 | buck1-supply = <&vin>; |
| 86 | buck2-supply = <&vin>; |
| 87 | buck3-supply = <&vin>; |
| 88 | buck4-supply = <&vin>; |
| 89 | ldo1-supply = <&vin>; |
| 90 | ldo4-supply = <&vin>; |
| 91 | ldo5-supply = <&vin>; |
| 92 | ldo6-supply = <&vin>; |
| 93 | vref_ddr-supply = <&vin>; |
| 94 | pwr_sw1-supply = <&bst_out>; |
| 95 | pwr_sw2-supply = <&v3v3_ao>; |
| 96 | |
| 97 | vddcpu: buck1 { |
| 98 | regulator-name = "vddcpu"; |
| 99 | regulator-min-microvolt = <1250000>; |
| 100 | regulator-max-microvolt = <1250000>; |
| 101 | regulator-always-on; |
| 102 | regulator-over-current-protection; |
| 103 | }; |
| 104 | |
| 105 | vdd_ddr: buck2 { |
| 106 | regulator-name = "vdd_ddr"; |
| 107 | regulator-min-microvolt = <1350000>; |
| 108 | regulator-max-microvolt = <1350000>; |
| 109 | regulator-always-on; |
| 110 | regulator-over-current-protection; |
| 111 | }; |
| 112 | |
| 113 | vdd: buck3 { |
| 114 | regulator-name = "vdd"; |
| 115 | regulator-min-microvolt = <3300000>; |
| 116 | regulator-max-microvolt = <3300000>; |
| 117 | regulator-always-on; |
| 118 | st,mask-reset; |
| 119 | regulator-over-current-protection; |
| 120 | }; |
| 121 | |
| 122 | vddcore: buck4 { |
| 123 | regulator-name = "vddcore"; |
| 124 | regulator-min-microvolt = <1250000>; |
| 125 | regulator-max-microvolt = <1250000>; |
| 126 | regulator-always-on; |
| 127 | regulator-over-current-protection; |
| 128 | }; |
| 129 | |
| 130 | vdd_adc: ldo1 { |
| 131 | regulator-name = "vdd_adc"; |
| 132 | regulator-min-microvolt = <3300000>; |
| 133 | regulator-max-microvolt = <3300000>; |
| 134 | }; |
| 135 | |
| 136 | vdd_usb: ldo4 { |
| 137 | regulator-name = "vdd_usb"; |
| 138 | regulator-min-microvolt = <3300000>; |
| 139 | regulator-max-microvolt = <3300000>; |
| 140 | }; |
| 141 | |
| 142 | vdd_sd: ldo5 { |
| 143 | regulator-name = "vdd_sd"; |
| 144 | regulator-min-microvolt = <3300000>; |
| 145 | regulator-max-microvolt = <3300000>; |
| 146 | regulator-boot-on; |
| 147 | }; |
| 148 | |
| 149 | v1v8_periph: ldo6 { |
| 150 | regulator-name = "v1v8_periph"; |
| 151 | regulator-min-microvolt = <1800000>; |
| 152 | regulator-max-microvolt = <1800000>; |
| 153 | }; |
| 154 | |
| 155 | vref_ddr: vref_ddr { |
| 156 | regulator-name = "vref_ddr"; |
| 157 | regulator-always-on; |
| 158 | }; |
| 159 | |
| 160 | bst_out: boost { |
| 161 | regulator-name = "bst_out"; |
| 162 | }; |
| 163 | |
| 164 | v3v3_sw: pwr_sw2 { |
| 165 | regulator-name = "v3v3_sw"; |
| 166 | regulator-active-discharge = <1>; |
| 167 | regulator-always-on; |
| 168 | }; |
| 169 | }; |
| 170 | }; |
| 171 | }; |
| 172 | |
| 173 | &iwdg2 { |
| 174 | timeout-sec = <32>; |
| 175 | status = "okay"; |
| 176 | }; |
| 177 | |
Yann Gautier | f790702 | 2021-09-08 17:14:21 +0200 | [diff] [blame] | 178 | &pka { |
| 179 | secure-status = "okay"; |
| 180 | }; |
| 181 | |
| 182 | &pwr_regulators { |
| 183 | vdd-supply = <&vdd>; |
| 184 | vdd_3v3_usbfs-supply = <&vdd_usb>; |
| 185 | }; |
| 186 | |
| 187 | &rcc { |
| 188 | st,clksrc = < |
| 189 | CLK_MPU_PLL1P |
| 190 | CLK_AXI_PLL2P |
| 191 | CLK_MLAHBS_PLL3 |
| 192 | CLK_CKPER_HSE |
| 193 | CLK_RTC_LSE |
| 194 | CLK_SDMMC1_PLL4P |
| 195 | CLK_SDMMC2_PLL4P |
| 196 | CLK_STGEN_HSE |
| 197 | CLK_USBPHY_HSE |
| 198 | CLK_I2C4_HSI |
| 199 | CLK_USBO_USBPHY |
| 200 | CLK_I2C12_HSI |
| 201 | CLK_UART2_HSI |
| 202 | CLK_UART4_HSI |
| 203 | CLK_SAES_AXI |
| 204 | >; |
| 205 | |
| 206 | st,clkdiv = < |
| 207 | DIV(DIV_AXI, 0) |
| 208 | DIV(DIV_MLAHB, 0) |
| 209 | DIV(DIV_APB1, 1) |
| 210 | DIV(DIV_APB2, 1) |
| 211 | DIV(DIV_APB3, 1) |
| 212 | DIV(DIV_APB4, 1) |
| 213 | DIV(DIV_APB5, 2) |
| 214 | DIV(DIV_APB6, 1) |
| 215 | DIV(DIV_RTC, 0) |
| 216 | >; |
| 217 | |
| 218 | st,pll_vco { |
| 219 | pll1_vco_1300Mhz: pll1-vco-1300Mhz { |
| 220 | src = < CLK_PLL12_HSE >; |
| 221 | divmn = < 2 80 >; |
| 222 | frac = < 0x800 >; |
| 223 | }; |
| 224 | |
| 225 | pll2_vco_1066Mhz: pll2-vco-1066Mhz { |
| 226 | src = < CLK_PLL12_HSE >; |
| 227 | divmn = < 2 65 >; |
| 228 | frac = < 0x1400 >; |
| 229 | }; |
| 230 | |
| 231 | pll3_vco_417_8Mhz: pll2-vco-417_8Mhz { |
| 232 | src = < CLK_PLL3_HSE >; |
| 233 | divmn = < 1 33 >; |
| 234 | frac = < 0x1a04 >; |
| 235 | }; |
| 236 | |
| 237 | pll4_vco_600Mhz: pll2-vco-600Mhz { |
| 238 | src = < CLK_PLL4_HSE >; |
| 239 | divmn = < 1 49 >; |
| 240 | }; |
| 241 | }; |
| 242 | |
| 243 | /* VCO = 1300.0 MHz => P = 650 (CPU) */ |
| 244 | pll1:st,pll@0 { |
| 245 | compatible = "st,stm32mp1-pll"; |
| 246 | reg = <0>; |
| 247 | |
| 248 | st,pll = < &pll1_cfg1 >; |
| 249 | |
| 250 | pll1_cfg1: pll1_cfg1 { |
| 251 | st,pll_vco = < &pll1_vco_1300Mhz >; |
| 252 | st,pll_div_pqr = < 0 1 1 >; |
| 253 | }; |
| 254 | }; |
| 255 | |
| 256 | /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 266, R = 533 (DDR) */ |
| 257 | pll2:st,pll@1 { |
| 258 | compatible = "st,stm32mp1-pll"; |
| 259 | reg = <1>; |
| 260 | |
| 261 | st,pll = < &pll2_cfg1 >; |
| 262 | |
| 263 | pll2_cfg1: pll2_cfg1 { |
| 264 | st,pll_vco = < &pll2_vco_1066Mhz >; |
| 265 | st,pll_div_pqr = < 1 1 0 >; |
| 266 | }; |
| 267 | }; |
| 268 | |
| 269 | /* VCO = 417.8 MHz => P = 209, Q = 24, R = 209 */ |
| 270 | pll3:st,pll@2 { |
| 271 | compatible = "st,stm32mp1-pll"; |
| 272 | reg = <2>; |
| 273 | |
| 274 | st,pll = < &pll3_cfg1 >; |
| 275 | |
| 276 | pll3_cfg1: pll3_cfg1 { |
| 277 | st,pll_vco = < &pll3_vco_417_8Mhz >; |
| 278 | st,pll_div_pqr = < 1 16 1 >; |
| 279 | }; |
| 280 | }; |
| 281 | |
| 282 | /* VCO = 600.0 MHz => P = 50, Q = 10, R = 100 */ |
| 283 | pll4:st,pll@3 { |
| 284 | compatible = "st,stm32mp1-pll"; |
| 285 | reg = <3>; |
| 286 | |
| 287 | st,pll = < &pll4_cfg1 >; |
| 288 | |
| 289 | pll4_cfg1: pll4_cfg1 { |
| 290 | st,pll_vco = < &pll4_vco_600Mhz >; |
| 291 | st,pll_div_pqr = < 11 59 5 >; |
| 292 | }; |
| 293 | }; |
| 294 | }; |
| 295 | |
| 296 | &rng { |
| 297 | status = "okay"; |
| 298 | }; |
| 299 | |
| 300 | &saes { |
| 301 | secure-status = "okay"; |
| 302 | }; |
| 303 | |
| 304 | &sdmmc1 { |
| 305 | pinctrl-names = "default"; |
Yann Gautier | 9f4037e | 2022-05-02 13:49:58 +0200 | [diff] [blame] | 306 | pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>; |
Yann Gautier | f790702 | 2021-09-08 17:14:21 +0200 | [diff] [blame] | 307 | disable-wp; |
| 308 | st,neg-edge; |
| 309 | bus-width = <4>; |
| 310 | vmmc-supply = <&vdd_sd>; |
| 311 | status = "okay"; |
| 312 | }; |
| 313 | |
| 314 | &uart4 { |
| 315 | pinctrl-names = "default"; |
| 316 | pinctrl-0 = <&uart4_pins_a>; |
| 317 | status = "okay"; |
| 318 | }; |
| 319 | |
| 320 | &uart8 { |
| 321 | pinctrl-names = "default"; |
| 322 | pinctrl-0 = <&uart8_pins_a>; |
| 323 | status = "disabled"; |
| 324 | }; |
| 325 | |
| 326 | &usart1 { |
| 327 | pinctrl-names = "default"; |
| 328 | pinctrl-0 = <&usart1_pins_a>; |
| 329 | uart-has-rtscts; |
| 330 | status = "disabled"; |
| 331 | }; |