Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
Dan Handley | b226a4d | 2014-05-16 14:08:45 +0100 | [diff] [blame] | 31 | #include <arch.h> |
| 32 | #include <arch_helpers.h> |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 33 | #include <assert.h> |
Vikram Kanigiri | 725b133 | 2015-03-04 10:34:27 +0000 | [diff] [blame] | 34 | #include <bl_common.h> |
Lin Ma | 741a382 | 2014-06-27 16:56:30 -0700 | [diff] [blame] | 35 | #include <cassert.h> |
Soby Mathew | c9bac9c | 2016-01-19 17:52:28 +0000 | [diff] [blame] | 36 | #include <debug.h> |
Dan Handley | ed6ff95 | 2014-05-14 17:44:19 +0100 | [diff] [blame] | 37 | #include <platform_def.h> |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 38 | #include <string.h> |
| 39 | #include <xlat_tables.h> |
| 40 | |
Soby Mathew | c9bac9c | 2016-01-19 17:52:28 +0000 | [diff] [blame] | 41 | #if LOG_LEVEL >= LOG_LEVEL_VERBOSE |
| 42 | #define LVL0_SPACER "" |
| 43 | #define LVL1_SPACER " " |
| 44 | #define LVL2_SPACER " " |
| 45 | #define LVL3_SPACER " " |
| 46 | #define get_level_spacer(level) \ |
| 47 | (((level) == 0) ? LVL0_SPACER : \ |
| 48 | (((level) == 1) ? LVL1_SPACER : \ |
| 49 | (((level) == 2) ? LVL2_SPACER : LVL3_SPACER))) |
| 50 | #define debug_print(...) tf_printf(__VA_ARGS__) |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 51 | #else |
| 52 | #define debug_print(...) ((void)0) |
| 53 | #endif |
| 54 | |
Lin Ma | 741a382 | 2014-06-27 16:56:30 -0700 | [diff] [blame] | 55 | CASSERT(ADDR_SPACE_SIZE > 0, assert_valid_addr_space_size); |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 56 | |
| 57 | #define UNSET_DESC ~0ul |
| 58 | |
| 59 | #define NUM_L1_ENTRIES (ADDR_SPACE_SIZE >> L1_XLAT_ADDRESS_SHIFT) |
| 60 | |
Dan Handley | b226a4d | 2014-05-16 14:08:45 +0100 | [diff] [blame] | 61 | static uint64_t l1_xlation_table[NUM_L1_ENTRIES] |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 62 | __aligned(NUM_L1_ENTRIES * sizeof(uint64_t)); |
| 63 | |
| 64 | static uint64_t xlat_tables[MAX_XLAT_TABLES][XLAT_TABLE_ENTRIES] |
Soren Brinkmann | 46dd170 | 2016-01-14 10:11:05 -0800 | [diff] [blame] | 65 | __aligned(XLAT_TABLE_SIZE) __section("xlat_table"); |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 66 | |
| 67 | static unsigned next_xlat; |
Lin Ma | 741a382 | 2014-06-27 16:56:30 -0700 | [diff] [blame] | 68 | static unsigned long max_pa; |
| 69 | static unsigned long max_va; |
| 70 | static unsigned long tcr_ps_bits; |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 71 | |
| 72 | /* |
| 73 | * Array of all memory regions stored in order of ascending base address. |
| 74 | * The list is terminated by the first entry with size == 0. |
| 75 | */ |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 76 | static mmap_region_t mmap[MAX_MMAP_REGIONS + 1]; |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 77 | |
| 78 | |
| 79 | static void print_mmap(void) |
| 80 | { |
Soby Mathew | c9bac9c | 2016-01-19 17:52:28 +0000 | [diff] [blame] | 81 | #if LOG_LEVEL >= LOG_LEVEL_VERBOSE |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 82 | debug_print("mmap:\n"); |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 83 | mmap_region_t *mm = mmap; |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 84 | while (mm->size) { |
Soby Mathew | c9bac9c | 2016-01-19 17:52:28 +0000 | [diff] [blame] | 85 | debug_print(" VA:0x%lx PA:0x%lx size:0x%lx attr:0x%x\n", |
| 86 | mm->base_va, mm->base_pa, mm->size, mm->attr); |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 87 | ++mm; |
| 88 | }; |
| 89 | debug_print("\n"); |
| 90 | #endif |
| 91 | } |
| 92 | |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 93 | void mmap_add_region(unsigned long base_pa, unsigned long base_va, |
| 94 | unsigned long size, unsigned attr) |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 95 | { |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 96 | mmap_region_t *mm = mmap; |
Vikram Kanigiri | 725b133 | 2015-03-04 10:34:27 +0000 | [diff] [blame] | 97 | mmap_region_t *mm_last = mm + ARRAY_SIZE(mmap) - 1; |
Lin Ma | 741a382 | 2014-06-27 16:56:30 -0700 | [diff] [blame] | 98 | unsigned long pa_end = base_pa + size - 1; |
| 99 | unsigned long va_end = base_va + size - 1; |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 100 | |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 101 | assert(IS_PAGE_ALIGNED(base_pa)); |
| 102 | assert(IS_PAGE_ALIGNED(base_va)); |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 103 | assert(IS_PAGE_ALIGNED(size)); |
| 104 | |
| 105 | if (!size) |
| 106 | return; |
| 107 | |
| 108 | /* Find correct place in mmap to insert new region */ |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 109 | while (mm->base_va < base_va && mm->size) |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 110 | ++mm; |
| 111 | |
| 112 | /* Make room for new region by moving other regions up by one place */ |
| 113 | memmove(mm + 1, mm, (uintptr_t)mm_last - (uintptr_t)mm); |
| 114 | |
| 115 | /* Check we haven't lost the empty sentinal from the end of the array */ |
| 116 | assert(mm_last->size == 0); |
| 117 | |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 118 | mm->base_pa = base_pa; |
| 119 | mm->base_va = base_va; |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 120 | mm->size = size; |
| 121 | mm->attr = attr; |
Lin Ma | 741a382 | 2014-06-27 16:56:30 -0700 | [diff] [blame] | 122 | |
| 123 | if (pa_end > max_pa) |
| 124 | max_pa = pa_end; |
| 125 | if (va_end > max_va) |
| 126 | max_va = va_end; |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 127 | } |
| 128 | |
Dan Handley | e2712bc | 2014-04-10 15:37:22 +0100 | [diff] [blame] | 129 | void mmap_add(const mmap_region_t *mm) |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 130 | { |
| 131 | while (mm->size) { |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 132 | mmap_add_region(mm->base_pa, mm->base_va, mm->size, mm->attr); |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 133 | ++mm; |
| 134 | } |
| 135 | } |
| 136 | |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 137 | static unsigned long mmap_desc(unsigned attr, unsigned long addr_pa, |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 138 | unsigned level) |
| 139 | { |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 140 | unsigned long desc = addr_pa; |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 141 | |
| 142 | desc |= level == 3 ? TABLE_DESC : BLOCK_DESC; |
| 143 | |
| 144 | desc |= attr & MT_NS ? LOWER_ATTRS(NS) : 0; |
| 145 | |
| 146 | desc |= attr & MT_RW ? LOWER_ATTRS(AP_RW) : LOWER_ATTRS(AP_RO); |
| 147 | |
| 148 | desc |= LOWER_ATTRS(ACCESS_FLAG); |
| 149 | |
| 150 | if (attr & MT_MEMORY) { |
| 151 | desc |= LOWER_ATTRS(ATTR_IWBWA_OWBWA_NTR_INDEX | ISH); |
| 152 | if (attr & MT_RW) |
| 153 | desc |= UPPER_ATTRS(XN); |
| 154 | } else { |
| 155 | desc |= LOWER_ATTRS(ATTR_DEVICE_INDEX | OSH); |
| 156 | desc |= UPPER_ATTRS(XN); |
| 157 | } |
| 158 | |
| 159 | debug_print(attr & MT_MEMORY ? "MEM" : "DEV"); |
| 160 | debug_print(attr & MT_RW ? "-RW" : "-RO"); |
| 161 | debug_print(attr & MT_NS ? "-NS" : "-S"); |
| 162 | |
| 163 | return desc; |
| 164 | } |
| 165 | |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 166 | static int mmap_region_attr(mmap_region_t *mm, unsigned long base_va, |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 167 | unsigned long size) |
| 168 | { |
| 169 | int attr = mm->attr; |
| 170 | |
| 171 | for (;;) { |
| 172 | ++mm; |
| 173 | |
| 174 | if (!mm->size) |
| 175 | return attr; /* Reached end of list */ |
| 176 | |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 177 | if (mm->base_va >= base_va + size) |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 178 | return attr; /* Next region is after area so end */ |
| 179 | |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 180 | if (mm->base_va + mm->size <= base_va) |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 181 | continue; /* Next region has already been overtaken */ |
| 182 | |
| 183 | if ((mm->attr & attr) == attr) |
| 184 | continue; /* Region doesn't override attribs so skip */ |
| 185 | |
| 186 | attr &= mm->attr; |
| 187 | |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 188 | if (mm->base_va > base_va || |
| 189 | mm->base_va + mm->size < base_va + size) |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 190 | return -1; /* Region doesn't fully cover our area */ |
| 191 | } |
| 192 | } |
| 193 | |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 194 | static mmap_region_t *init_xlation_table(mmap_region_t *mm, |
| 195 | unsigned long base_va, |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 196 | unsigned long *table, unsigned level) |
| 197 | { |
| 198 | unsigned level_size_shift = L1_XLAT_ADDRESS_SHIFT - (level - 1) * |
| 199 | XLAT_TABLE_ENTRIES_SHIFT; |
| 200 | unsigned level_size = 1 << level_size_shift; |
Lin Ma | 0b9d59f | 2014-05-20 11:25:55 -0700 | [diff] [blame] | 201 | unsigned long level_index_mask = XLAT_TABLE_ENTRIES_MASK << level_size_shift; |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 202 | |
| 203 | assert(level <= 3); |
| 204 | |
| 205 | debug_print("New xlat table:\n"); |
| 206 | |
| 207 | do { |
| 208 | unsigned long desc = UNSET_DESC; |
| 209 | |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 210 | if (mm->base_va + mm->size <= base_va) { |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 211 | /* Area now after the region so skip it */ |
| 212 | ++mm; |
| 213 | continue; |
| 214 | } |
| 215 | |
Soby Mathew | c9bac9c | 2016-01-19 17:52:28 +0000 | [diff] [blame] | 216 | debug_print("%s VA:0x%lx size:0x%x ", get_level_spacer(level), |
| 217 | base_va, level_size); |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 218 | |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 219 | if (mm->base_va >= base_va + level_size) { |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 220 | /* Next region is after area so nothing to map yet */ |
| 221 | desc = INVALID_DESC; |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 222 | } else if (mm->base_va <= base_va && mm->base_va + mm->size >= |
| 223 | base_va + level_size) { |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 224 | /* Next region covers all of area */ |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 225 | int attr = mmap_region_attr(mm, base_va, level_size); |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 226 | if (attr >= 0) |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 227 | desc = mmap_desc(attr, |
| 228 | base_va - mm->base_va + mm->base_pa, |
| 229 | level); |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 230 | } |
| 231 | /* else Next region only partially covers area, so need */ |
| 232 | |
| 233 | if (desc == UNSET_DESC) { |
| 234 | /* Area not covered by a region so need finer table */ |
| 235 | unsigned long *new_table = xlat_tables[next_xlat++]; |
| 236 | assert(next_xlat <= MAX_XLAT_TABLES); |
| 237 | desc = TABLE_DESC | (unsigned long)new_table; |
| 238 | |
| 239 | /* Recurse to fill in new table */ |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 240 | mm = init_xlation_table(mm, base_va, |
| 241 | new_table, level+1); |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 242 | } |
| 243 | |
| 244 | debug_print("\n"); |
| 245 | |
| 246 | *table++ = desc; |
Lin Ma | 1359236 | 2014-06-02 11:45:36 -0700 | [diff] [blame] | 247 | base_va += level_size; |
| 248 | } while (mm->size && (base_va & level_index_mask)); |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 249 | |
| 250 | return mm; |
| 251 | } |
| 252 | |
Lin Ma | 741a382 | 2014-06-27 16:56:30 -0700 | [diff] [blame] | 253 | static unsigned int calc_physical_addr_size_bits(unsigned long max_addr) |
| 254 | { |
| 255 | /* Physical address can't exceed 48 bits */ |
| 256 | assert((max_addr & ADDR_MASK_48_TO_63) == 0); |
| 257 | |
| 258 | /* 48 bits address */ |
| 259 | if (max_addr & ADDR_MASK_44_TO_47) |
| 260 | return TCR_PS_BITS_256TB; |
| 261 | |
| 262 | /* 44 bits address */ |
| 263 | if (max_addr & ADDR_MASK_42_TO_43) |
| 264 | return TCR_PS_BITS_16TB; |
| 265 | |
| 266 | /* 42 bits address */ |
| 267 | if (max_addr & ADDR_MASK_40_TO_41) |
| 268 | return TCR_PS_BITS_4TB; |
| 269 | |
| 270 | /* 40 bits address */ |
| 271 | if (max_addr & ADDR_MASK_36_TO_39) |
| 272 | return TCR_PS_BITS_1TB; |
| 273 | |
| 274 | /* 36 bits address */ |
| 275 | if (max_addr & ADDR_MASK_32_TO_35) |
| 276 | return TCR_PS_BITS_64GB; |
| 277 | |
| 278 | return TCR_PS_BITS_4GB; |
| 279 | } |
| 280 | |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 281 | void init_xlat_tables(void) |
| 282 | { |
| 283 | print_mmap(); |
| 284 | init_xlation_table(mmap, 0, l1_xlation_table, 1); |
Lin Ma | 741a382 | 2014-06-27 16:56:30 -0700 | [diff] [blame] | 285 | tcr_ps_bits = calc_physical_addr_size_bits(max_pa); |
| 286 | assert(max_va < ADDR_SPACE_SIZE); |
Jon Medhurst | bb1fe20 | 2014-01-24 15:41:33 +0000 | [diff] [blame] | 287 | } |
Dan Handley | b226a4d | 2014-05-16 14:08:45 +0100 | [diff] [blame] | 288 | |
| 289 | /******************************************************************************* |
| 290 | * Macro generating the code for the function enabling the MMU in the given |
| 291 | * exception level, assuming that the pagetables have already been created. |
| 292 | * |
| 293 | * _el: Exception level at which the function will run |
| 294 | * _tcr_extra: Extra bits to set in the TCR register. This mask will |
| 295 | * be OR'ed with the default TCR value. |
| 296 | * _tlbi_fct: Function to invalidate the TLBs at the current |
| 297 | * exception level |
| 298 | ******************************************************************************/ |
| 299 | #define DEFINE_ENABLE_MMU_EL(_el, _tcr_extra, _tlbi_fct) \ |
Achin Gupta | e998254 | 2014-06-26 08:59:07 +0100 | [diff] [blame] | 300 | void enable_mmu_el##_el(uint32_t flags) \ |
Dan Handley | b226a4d | 2014-05-16 14:08:45 +0100 | [diff] [blame] | 301 | { \ |
| 302 | uint64_t mair, tcr, ttbr; \ |
| 303 | uint32_t sctlr; \ |
| 304 | \ |
| 305 | assert(IS_IN_EL(_el)); \ |
| 306 | assert((read_sctlr_el##_el() & SCTLR_M_BIT) == 0); \ |
| 307 | \ |
| 308 | /* Set attributes in the right indices of the MAIR */ \ |
| 309 | mair = MAIR_ATTR_SET(ATTR_DEVICE, ATTR_DEVICE_INDEX); \ |
| 310 | mair |= MAIR_ATTR_SET(ATTR_IWBWA_OWBWA_NTR, \ |
| 311 | ATTR_IWBWA_OWBWA_NTR_INDEX); \ |
| 312 | write_mair_el##_el(mair); \ |
| 313 | \ |
| 314 | /* Invalidate TLBs at the current exception level */ \ |
| 315 | _tlbi_fct(); \ |
| 316 | \ |
| 317 | /* Set TCR bits as well. */ \ |
| 318 | /* Inner & outer WBWA & shareable + T0SZ = 32 */ \ |
| 319 | tcr = TCR_SH_INNER_SHAREABLE | TCR_RGN_OUTER_WBA | \ |
Lin Ma | 741a382 | 2014-06-27 16:56:30 -0700 | [diff] [blame] | 320 | TCR_RGN_INNER_WBA | \ |
| 321 | (64 - __builtin_ctzl(ADDR_SPACE_SIZE)); \ |
Dan Handley | b226a4d | 2014-05-16 14:08:45 +0100 | [diff] [blame] | 322 | tcr |= _tcr_extra; \ |
| 323 | write_tcr_el##_el(tcr); \ |
| 324 | \ |
| 325 | /* Set TTBR bits as well */ \ |
| 326 | ttbr = (uint64_t) l1_xlation_table; \ |
| 327 | write_ttbr0_el##_el(ttbr); \ |
| 328 | \ |
| 329 | /* Ensure all translation table writes have drained */ \ |
| 330 | /* into memory, the TLB invalidation is complete, */ \ |
| 331 | /* and translation register writes are committed */ \ |
| 332 | /* before enabling the MMU */ \ |
| 333 | dsb(); \ |
| 334 | isb(); \ |
| 335 | \ |
| 336 | sctlr = read_sctlr_el##_el(); \ |
Achin Gupta | 9f09835 | 2014-07-18 18:38:28 +0100 | [diff] [blame] | 337 | sctlr |= SCTLR_WXN_BIT | SCTLR_M_BIT; \ |
Achin Gupta | e998254 | 2014-06-26 08:59:07 +0100 | [diff] [blame] | 338 | \ |
| 339 | if (flags & DISABLE_DCACHE) \ |
| 340 | sctlr &= ~SCTLR_C_BIT; \ |
| 341 | else \ |
| 342 | sctlr |= SCTLR_C_BIT; \ |
| 343 | \ |
Dan Handley | b226a4d | 2014-05-16 14:08:45 +0100 | [diff] [blame] | 344 | write_sctlr_el##_el(sctlr); \ |
| 345 | \ |
| 346 | /* Ensure the MMU enable takes effect immediately */ \ |
| 347 | isb(); \ |
| 348 | } |
| 349 | |
| 350 | /* Define EL1 and EL3 variants of the function enabling the MMU */ |
Lin Ma | 741a382 | 2014-06-27 16:56:30 -0700 | [diff] [blame] | 351 | DEFINE_ENABLE_MMU_EL(1, |
| 352 | (tcr_ps_bits << TCR_EL1_IPS_SHIFT), |
| 353 | tlbivmalle1) |
| 354 | DEFINE_ENABLE_MMU_EL(3, |
| 355 | TCR_EL3_RES1 | (tcr_ps_bits << TCR_EL3_PS_SHIFT), |
| 356 | tlbialle3) |