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Soby Mathew49473e42015-06-10 13:49:59 +01001/*
2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch.h>
32#include <asm_macros.S>
33#include <assert_macros.S>
34#include <platform_def.h>
35
36 .globl plat_my_core_pos
37 .globl plat_is_my_cpu_primary
38 .globl plat_get_my_entrypoint
39 .weak platform_get_core_pos
40
41 /* -----------------------------------------------------
42 * Compatibility wrappers for new platform APIs.
43 * -----------------------------------------------------
44 */
45func plat_my_core_pos
46 mrs x0, mpidr_el1
47 b platform_get_core_pos
48endfunc plat_my_core_pos
49
50func plat_is_my_cpu_primary
51 mrs x0, mpidr_el1
52 b platform_is_primary_cpu
53endfunc plat_is_my_cpu_primary
54
55func plat_get_my_entrypoint
56 mrs x0, mpidr_el1
57 b platform_get_entrypoint
58endfunc plat_get_my_entrypoint
59
60 /* -----------------------------------------------------
61 * int platform_get_core_pos(int mpidr);
62 * With this function: CorePos = (ClusterId * 4) +
63 * CoreId
64 * -----------------------------------------------------
65 */
66func platform_get_core_pos
67 and x1, x0, #MPIDR_CPU_MASK
68 and x0, x0, #MPIDR_CLUSTER_MASK
69 add x0, x1, x0, LSR #6
70 ret
71endfunc platform_get_core_pos