blob: 1f7a4dcdd4e5ff6d9e4dab0d302ea34c7df938cc [file] [log] [blame]
Varun Wadekarb316e242015-05-19 16:48:04 +05301#
Varun Wadekared3c62b2017-03-06 09:15:15 -08002# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Varun Wadekarb316e242015-05-19 16:48:04 +05303#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are met:
6#
7# Redistributions of source code must retain the above copyright notice, this
8# list of conditions and the following disclaimer.
9#
10# Redistributions in binary form must reproduce the above copyright notice,
11# this list of conditions and the following disclaimer in the documentation
12# and/or other materials provided with the distribution.
13#
14# Neither the name of ARM nor the names of its contributors may be used
15# to endorse or promote products derived from this software without specific
16# prior written permission.
17#
18# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28# POSSIBILITY OF SUCH DAMAGE.
29#
30
Varun Wadekara78bb1b2015-08-07 10:03:00 +053031SOC_DIR := plat/nvidia/tegra/soc/${TARGET_SOC}
32
Varun Wadekara441f722017-04-26 13:46:11 -070033# dump the state on crash console
34CRASH_REPORTING := 1
35$(eval $(call add_define,CRASH_REPORTING))
Varun Wadekar6077dce2016-01-27 11:31:06 -080036
Varun Wadekar38c80222017-04-26 13:48:19 -070037# enable assert() for release/debug builds
38ENABLE_ASSERTIONS := 1
39
Varun Wadekara78bb1b2015-08-07 10:03:00 +053040# Disable the PSCI platform compatibility layer
41ENABLE_PLAT_COMPAT := 0
Varun Wadekarb316e242015-05-19 16:48:04 +053042
Varun Wadekara441f722017-04-26 13:46:11 -070043# enable dynamic memory mapping
44PLAT_XLAT_TABLES_DYNAMIC := 1
45$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
46
47# Enable PSCI v1.0 extended state ID format
48PSCI_EXTENDED_STATE_ID := 1
49
50# code and read-only data should be put on separate memory pages
51SEPARATE_CODE_AND_RODATA := 1
52
53# do not use coherent memory
54USE_COHERENT_MEM := 0
55
Varun Wadekarb316e242015-05-19 16:48:04 +053056include plat/nvidia/tegra/common/tegra_common.mk
57include ${SOC_DIR}/platform_${TARGET_SOC}.mk
Varun Wadekarc39b0ba2015-07-21 10:16:13 +053058
59# modify BUILD_PLAT to point to SoC specific build directory
60BUILD_PLAT := ${BUILD_BASE}/${PLAT}/${TARGET_SOC}/${BUILD_TYPE}