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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Antonio Nino Diazd3ec5432017-02-17 17:11:27 +00002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30#include <asm_macros.S>
31#include <platform_def.h>
32
Soby Mathewfec4eb72015-07-01 16:16:20 +010033 .weak plat_arm_calc_core_pos
34 .weak plat_my_core_pos
Dan Handley9df48042015-03-19 18:58:55 +000035 .globl plat_crash_console_init
36 .globl plat_crash_console_putc
Antonio Nino Diazd3ec5432017-02-17 17:11:27 +000037 .globl plat_crash_console_flush
Sandrine Bailleuxaa94ffa2015-07-10 17:33:26 +010038 .globl platform_mem_init
Dan Handley9df48042015-03-19 18:58:55 +000039
Soby Mathewfec4eb72015-07-01 16:16:20 +010040
41 /* -----------------------------------------------------
42 * unsigned int plat_my_core_pos(void)
43 * This function uses the plat_arm_calc_core_pos()
44 * definition to get the index of the calling CPU.
45 * -----------------------------------------------------
46 */
47func plat_my_core_pos
48 mrs x0, mpidr_el1
49 b plat_arm_calc_core_pos
50endfunc plat_my_core_pos
51
52 /* -----------------------------------------------------
Soby Mathewa0fedc42016-06-16 14:52:04 +010053 * unsigned int plat_arm_calc_core_pos(u_register_t mpidr)
Soby Mathewfec4eb72015-07-01 16:16:20 +010054 * Helper function to calculate the core position.
55 * With this function: CorePos = (ClusterId * 4) +
56 * CoreId
57 * -----------------------------------------------------
58 */
59func plat_arm_calc_core_pos
60 and x1, x0, #MPIDR_CPU_MASK
61 and x0, x0, #MPIDR_CLUSTER_MASK
62 add x0, x1, x0, LSR #6
63 ret
64endfunc plat_arm_calc_core_pos
Dan Handley9df48042015-03-19 18:58:55 +000065
66 /* ---------------------------------------------
67 * int plat_crash_console_init(void)
68 * Function to initialize the crash console
69 * without a C Runtime to print crash report.
Juan Castilloe7ae6db2015-11-26 14:52:15 +000070 * Clobber list : x0 - x4
Dan Handley9df48042015-03-19 18:58:55 +000071 * ---------------------------------------------
72 */
73func plat_crash_console_init
74 mov_imm x0, PLAT_ARM_CRASH_UART_BASE
75 mov_imm x1, PLAT_ARM_CRASH_UART_CLK_IN_HZ
76 mov_imm x2, ARM_CONSOLE_BAUDRATE
77 b console_core_init
78endfunc plat_crash_console_init
79
80 /* ---------------------------------------------
81 * int plat_crash_console_putc(int c)
82 * Function to print a character on the crash
83 * console without a C Runtime.
84 * Clobber list : x1, x2
85 * ---------------------------------------------
86 */
87func plat_crash_console_putc
88 mov_imm x1, PLAT_ARM_CRASH_UART_BASE
89 b console_core_putc
90endfunc plat_crash_console_putc
Sandrine Bailleuxaa94ffa2015-07-10 17:33:26 +010091
Antonio Nino Diazd3ec5432017-02-17 17:11:27 +000092 /* ---------------------------------------------
93 * int plat_crash_console_flush()
94 * Function to force a write of all buffered
95 * data that hasn't been output.
96 * Out : return -1 on error else return 0.
97 * Clobber list : r0 - r1
98 * ---------------------------------------------
99 */
100func plat_crash_console_flush
101 mov_imm x1, PLAT_ARM_CRASH_UART_BASE
102 b console_core_flush
103endfunc plat_crash_console_flush
104
Sandrine Bailleuxaa94ffa2015-07-10 17:33:26 +0100105 /* ---------------------------------------------------------------------
106 * We don't need to carry out any memory initialization on ARM
107 * platforms. The Secure RAM is accessible straight away.
108 * ---------------------------------------------------------------------
109 */
110func platform_mem_init
111 ret
112endfunc platform_mem_init