blob: 37cab3b2a661438877dc86ba126a08569bd24cc5 [file] [log] [blame]
Dan Handley610e7e12018-03-01 18:44:00 +00001Trusted Firmware-A for Socionext UniPhier SoCs
2==============================================
Douglas Raillardd7c21b72017-06-28 15:23:03 +01003
Masahiro Yamada62a197a2017-12-19 22:30:24 +09004
Dan Handley610e7e12018-03-01 18:44:00 +00005Socionext UniPhier Armv8-A SoCs use Trusted Firmware-A (TF-A) as the secure
6world firmware, supporting BL2 and BL31.
Douglas Raillardd7c21b72017-06-28 15:23:03 +01007
Masahiro Yamada75bfecb2017-12-19 11:56:05 +09008UniPhier SoC family implements its internal boot ROM, which loads 64KB [1]_
9image from a non-volatile storage to the on-chip SRAM, and jumps over to it.
Dan Handley610e7e12018-03-01 18:44:00 +000010TF-A provides a special mode, BL2-AT-EL3, which enables BL2 to execute at EL3.
11It is useful for platforms with non-TF-A boot ROM, like UniPhier. Here, a
12problem is BL2 does not fit in the 64KB limit if `Trusted Board Boot`_ (TBB)
13is enabled. To solve this issue, Socionext provides a first stage loader
Masahiro Yamada75bfecb2017-12-19 11:56:05 +090014called `UniPhier BL`_. This loader runs in the on-chip SRAM, initializes the
15DRAM, expands BL2 there, and hands the control over to it. Therefore, all images
Dan Handley610e7e12018-03-01 18:44:00 +000016of TF-A run in DRAM.
Douglas Raillardd7c21b72017-06-28 15:23:03 +010017
18The UniPhier platform works with/without TBB. See below for the build process
19of each case. The image authentication for the UniPhier platform fully
20complies with the Trusted Board Boot Requirements (TBBR) specification.
21
22The UniPhier BL does not implement the authentication functionality, that is,
Masahiro Yamada75bfecb2017-12-19 11:56:05 +090023it can not verify the BL2 image by itself. Instead, the UniPhier BL assures
24the BL2 validity in a different way; BL2 is GZIP-compressed and appended to
25the UniPhier BL. The concatenation of the UniPhier BL and the compressed BL2
26fits in the 64KB limit. The concatenated image is loaded by the internal boot
27ROM (and verified if the chip fuses are blown).
Douglas Raillardd7c21b72017-06-28 15:23:03 +010028
Douglas Raillardd7c21b72017-06-28 15:23:03 +010029
30Boot Flow
31---------
32
Masahiro Yamada62a197a2017-12-19 22:30:24 +0900331. The Boot ROM
Douglas Raillardd7c21b72017-06-28 15:23:03 +010034
Masahiro Yamada62a197a2017-12-19 22:30:24 +090035 This is hard-wired ROM, so never corrupted. It loads the UniPhier BL (with
Masahiro Yamada75bfecb2017-12-19 11:56:05 +090036 compressed-BL2 appended) into the on-chip SRAM. If the SoC fuses are blown,
Masahiro Yamada62a197a2017-12-19 22:30:24 +090037 the image is verified by the SoC's own method.
Douglas Raillardd7c21b72017-06-28 15:23:03 +010038
Masahiro Yamada62a197a2017-12-19 22:30:24 +0900392. UniPhier BL
Douglas Raillardd7c21b72017-06-28 15:23:03 +010040
Masahiro Yamada62a197a2017-12-19 22:30:24 +090041 This runs in the on-chip SRAM. After the minimum SoC initialization and DRAM
Masahiro Yamada75bfecb2017-12-19 11:56:05 +090042 setup, it decompresses the appended BL2 image into the DRAM, then jumps to
43 the BL2 entry.
Douglas Raillardd7c21b72017-06-28 15:23:03 +010044
Masahiro Yamada75bfecb2017-12-19 11:56:05 +0900453. BL2 (at EL3)
Douglas Raillardd7c21b72017-06-28 15:23:03 +010046
Masahiro Yamada75bfecb2017-12-19 11:56:05 +090047 This runs in the DRAM. It extracts more images such as BL31, BL33 (optionally
48 SCP_BL2, BL32 as well) from Firmware Image Package (FIP). If TBB is enabled,
Dan Handley610e7e12018-03-01 18:44:00 +000049 they are all authenticated by the standard mechanism of TF-A.
Masahiro Yamada75bfecb2017-12-19 11:56:05 +090050 After loading all the images, it jumps to the BL31 entry.
Douglas Raillardd7c21b72017-06-28 15:23:03 +010051
Masahiro Yamada75bfecb2017-12-19 11:56:05 +0900524. BL31, BL32, and BL33
Douglas Raillardd7c21b72017-06-28 15:23:03 +010053
Masahiro Yamada75bfecb2017-12-19 11:56:05 +090054 They all run in the DRAM. See `Firmware Design`_ for details.
Masahiro Yamada62a197a2017-12-19 22:30:24 +090055
Douglas Raillardd7c21b72017-06-28 15:23:03 +010056
57Basic Build
58-----------
59
Masahiro Yamada75bfecb2017-12-19 11:56:05 +090060BL2 must be compressed for the reason above. The UniPhier's platform makefile
61provides a build target ``bl2_gzip`` for this.
Douglas Raillardd7c21b72017-06-28 15:23:03 +010062
63For a non-secure boot loader (aka BL33), U-Boot is well supported for UniPhier
64SoCs. The U-Boot image (``u-boot.bin``) must be built in advance. For the build
65procedure of U-Boot, refer to the document in the `U-Boot`_ project.
66
Masahiro Yamada62a197a2017-12-19 22:30:24 +090067To build minimum functionality for UniPhier (without TBB)::
Douglas Raillardd7c21b72017-06-28 15:23:03 +010068
Masahiro Yamada75bfecb2017-12-19 11:56:05 +090069 make CROSS_COMPILE=<gcc-prefix> PLAT=uniphier BL33=<path-to-BL33> bl2_gzip fip
Douglas Raillardd7c21b72017-06-28 15:23:03 +010070
71Output images:
72
Masahiro Yamada75bfecb2017-12-19 11:56:05 +090073- ``bl2.bin.gz``
Masahiro Yamada62a197a2017-12-19 22:30:24 +090074- ``fip.bin``
75
Douglas Raillardd7c21b72017-06-28 15:23:03 +010076
77Optional features
78-----------------
79
Masahiro Yamada62a197a2017-12-19 22:30:24 +090080- Trusted Board Boot
Douglas Raillardd7c21b72017-06-28 15:23:03 +010081
Masahiro Yamada62a197a2017-12-19 22:30:24 +090082 `mbed TLS`_ is needed as the cryptographic and image parser modules.
83 Refer to the `User Guide`_ for the appropriate version of mbed TLS.
Douglas Raillardd7c21b72017-06-28 15:23:03 +010084
Masahiro Yamada62a197a2017-12-19 22:30:24 +090085 To enable TBB, add the following options to the build command::
Douglas Raillardd7c21b72017-06-28 15:23:03 +010086
87 TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 MBEDTLS_DIR=<path-to-mbedtls>
88
Masahiro Yamada62a197a2017-12-19 22:30:24 +090089- System Control Processor (SCP)
Douglas Raillardd7c21b72017-06-28 15:23:03 +010090
Masahiro Yamada62a197a2017-12-19 22:30:24 +090091 If desired, FIP can include an SCP BL2 image. If BL2 finds an SCP BL2 image
92 in FIP, BL2 loads it into DRAM and kicks the SCP. Most of UniPhier boards
93 still work without SCP, but SCP provides better power management support.
Douglas Raillardd7c21b72017-06-28 15:23:03 +010094
Masahiro Yamada62a197a2017-12-19 22:30:24 +090095 To include SCP BL2, add the following option to the build command::
Douglas Raillardd7c21b72017-06-28 15:23:03 +010096
97 SCP_BL2=<path-to-SCP>
98
Masahiro Yamada62a197a2017-12-19 22:30:24 +090099- BL32 (Secure Payload)
Douglas Raillardd7c21b72017-06-28 15:23:03 +0100100
Masahiro Yamada62a197a2017-12-19 22:30:24 +0900101 To enable BL32, add the following options to the build command::
Douglas Raillardd7c21b72017-06-28 15:23:03 +0100102
103 SPD=<spd> BL32=<path-to-BL32>
104
Masahiro Yamada62a197a2017-12-19 22:30:24 +0900105 If you use TSP for BL32, ``BL32=<path-to-BL32>`` is not required. Just add the
106 following::
Douglas Raillardd7c21b72017-06-28 15:23:03 +0100107
108 SPD=tspd
109
Masahiro Yamada62a197a2017-12-19 22:30:24 +0900110
111.. [1] Some SoCs can load 80KB, but the software implementation must be aligned
112 to the lowest common denominator.
Douglas Raillardd7c21b72017-06-28 15:23:03 +0100113.. _Trusted Board Boot: ../trusted-board-boot.rst
114.. _UniPhier BL: https://github.com/uniphier/uniphier-bl
115.. _Firmware Design: ../firmware-design.rst
116.. _U-Boot: https://www.denx.de/wiki/U-Boot
117.. _mbed TLS: https://tls.mbed.org/
118.. _User Guide: ../user-guide.rst