Dan Handley | 610e7e1 | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 1 | Trusted Firmware-A for Socionext UniPhier SoCs |
| 2 | ============================================== |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 3 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 4 | |
Dan Handley | 610e7e1 | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 5 | Socionext UniPhier Armv8-A SoCs use Trusted Firmware-A (TF-A) as the secure |
| 6 | world firmware, supporting BL2 and BL31. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 7 | |
Masahiro Yamada | 75bfecb | 2017-12-19 11:56:05 +0900 | [diff] [blame] | 8 | UniPhier SoC family implements its internal boot ROM, which loads 64KB [1]_ |
| 9 | image from a non-volatile storage to the on-chip SRAM, and jumps over to it. |
Dan Handley | 610e7e1 | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 10 | TF-A provides a special mode, BL2-AT-EL3, which enables BL2 to execute at EL3. |
| 11 | It is useful for platforms with non-TF-A boot ROM, like UniPhier. Here, a |
| 12 | problem is BL2 does not fit in the 64KB limit if `Trusted Board Boot`_ (TBB) |
| 13 | is enabled. To solve this issue, Socionext provides a first stage loader |
Masahiro Yamada | 75bfecb | 2017-12-19 11:56:05 +0900 | [diff] [blame] | 14 | called `UniPhier BL`_. This loader runs in the on-chip SRAM, initializes the |
| 15 | DRAM, expands BL2 there, and hands the control over to it. Therefore, all images |
Dan Handley | 610e7e1 | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 16 | of TF-A run in DRAM. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 17 | |
| 18 | The UniPhier platform works with/without TBB. See below for the build process |
| 19 | of each case. The image authentication for the UniPhier platform fully |
| 20 | complies with the Trusted Board Boot Requirements (TBBR) specification. |
| 21 | |
| 22 | The UniPhier BL does not implement the authentication functionality, that is, |
Masahiro Yamada | 75bfecb | 2017-12-19 11:56:05 +0900 | [diff] [blame] | 23 | it can not verify the BL2 image by itself. Instead, the UniPhier BL assures |
| 24 | the BL2 validity in a different way; BL2 is GZIP-compressed and appended to |
| 25 | the UniPhier BL. The concatenation of the UniPhier BL and the compressed BL2 |
| 26 | fits in the 64KB limit. The concatenated image is loaded by the internal boot |
| 27 | ROM (and verified if the chip fuses are blown). |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 28 | |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 29 | |
| 30 | Boot Flow |
| 31 | --------- |
| 32 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 33 | 1. The Boot ROM |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 34 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 35 | This is hard-wired ROM, so never corrupted. It loads the UniPhier BL (with |
Masahiro Yamada | 75bfecb | 2017-12-19 11:56:05 +0900 | [diff] [blame] | 36 | compressed-BL2 appended) into the on-chip SRAM. If the SoC fuses are blown, |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 37 | the image is verified by the SoC's own method. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 38 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 39 | 2. UniPhier BL |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 40 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 41 | This runs in the on-chip SRAM. After the minimum SoC initialization and DRAM |
Masahiro Yamada | 75bfecb | 2017-12-19 11:56:05 +0900 | [diff] [blame] | 42 | setup, it decompresses the appended BL2 image into the DRAM, then jumps to |
| 43 | the BL2 entry. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 44 | |
Masahiro Yamada | 75bfecb | 2017-12-19 11:56:05 +0900 | [diff] [blame] | 45 | 3. BL2 (at EL3) |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 46 | |
Masahiro Yamada | 75bfecb | 2017-12-19 11:56:05 +0900 | [diff] [blame] | 47 | This runs in the DRAM. It extracts more images such as BL31, BL33 (optionally |
| 48 | SCP_BL2, BL32 as well) from Firmware Image Package (FIP). If TBB is enabled, |
Dan Handley | 610e7e1 | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 49 | they are all authenticated by the standard mechanism of TF-A. |
Masahiro Yamada | 75bfecb | 2017-12-19 11:56:05 +0900 | [diff] [blame] | 50 | After loading all the images, it jumps to the BL31 entry. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 51 | |
Masahiro Yamada | 75bfecb | 2017-12-19 11:56:05 +0900 | [diff] [blame] | 52 | 4. BL31, BL32, and BL33 |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 53 | |
Masahiro Yamada | 75bfecb | 2017-12-19 11:56:05 +0900 | [diff] [blame] | 54 | They all run in the DRAM. See `Firmware Design`_ for details. |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 55 | |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 56 | |
| 57 | Basic Build |
| 58 | ----------- |
| 59 | |
Masahiro Yamada | 75bfecb | 2017-12-19 11:56:05 +0900 | [diff] [blame] | 60 | BL2 must be compressed for the reason above. The UniPhier's platform makefile |
| 61 | provides a build target ``bl2_gzip`` for this. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 62 | |
| 63 | For a non-secure boot loader (aka BL33), U-Boot is well supported for UniPhier |
| 64 | SoCs. The U-Boot image (``u-boot.bin``) must be built in advance. For the build |
| 65 | procedure of U-Boot, refer to the document in the `U-Boot`_ project. |
| 66 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 67 | To build minimum functionality for UniPhier (without TBB):: |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 68 | |
Masahiro Yamada | 75bfecb | 2017-12-19 11:56:05 +0900 | [diff] [blame] | 69 | make CROSS_COMPILE=<gcc-prefix> PLAT=uniphier BL33=<path-to-BL33> bl2_gzip fip |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 70 | |
| 71 | Output images: |
| 72 | |
Masahiro Yamada | 75bfecb | 2017-12-19 11:56:05 +0900 | [diff] [blame] | 73 | - ``bl2.bin.gz`` |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 74 | - ``fip.bin`` |
| 75 | |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 76 | |
| 77 | Optional features |
| 78 | ----------------- |
| 79 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 80 | - Trusted Board Boot |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 81 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 82 | `mbed TLS`_ is needed as the cryptographic and image parser modules. |
| 83 | Refer to the `User Guide`_ for the appropriate version of mbed TLS. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 84 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 85 | To enable TBB, add the following options to the build command:: |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 86 | |
| 87 | TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 MBEDTLS_DIR=<path-to-mbedtls> |
| 88 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 89 | - System Control Processor (SCP) |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 90 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 91 | If desired, FIP can include an SCP BL2 image. If BL2 finds an SCP BL2 image |
| 92 | in FIP, BL2 loads it into DRAM and kicks the SCP. Most of UniPhier boards |
| 93 | still work without SCP, but SCP provides better power management support. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 94 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 95 | To include SCP BL2, add the following option to the build command:: |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 96 | |
| 97 | SCP_BL2=<path-to-SCP> |
| 98 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 99 | - BL32 (Secure Payload) |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 100 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 101 | To enable BL32, add the following options to the build command:: |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 102 | |
| 103 | SPD=<spd> BL32=<path-to-BL32> |
| 104 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 105 | If you use TSP for BL32, ``BL32=<path-to-BL32>`` is not required. Just add the |
| 106 | following:: |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 107 | |
| 108 | SPD=tspd |
| 109 | |
Masahiro Yamada | 62a197a | 2017-12-19 22:30:24 +0900 | [diff] [blame] | 110 | |
| 111 | .. [1] Some SoCs can load 80KB, but the software implementation must be aligned |
| 112 | to the lowest common denominator. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 113 | .. _Trusted Board Boot: ../trusted-board-boot.rst |
| 114 | .. _UniPhier BL: https://github.com/uniphier/uniphier-bl |
| 115 | .. _Firmware Design: ../firmware-design.rst |
| 116 | .. _U-Boot: https://www.denx.de/wiki/U-Boot |
| 117 | .. _mbed TLS: https://tls.mbed.org/ |
| 118 | .. _User Guide: ../user-guide.rst |