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Carlo Caione49488322019-08-24 17:28:23 +01001/*
2 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef GXBB_PRIVATE_H
8#define GXBB_PRIVATE_H
9
10#include <stddef.h>
11#include <stdint.h>
12
13/* Utility functions */
Carlo Caione1afdfb02019-08-24 18:47:06 +010014unsigned int plat_calc_core_pos(u_register_t mpidr);
Carlo Caionebf2d6262019-08-25 18:09:03 +010015void aml_console_init(void);
16void aml_setup_page_tables(void);
Carlo Caione49488322019-08-24 17:28:23 +010017
18/* MHU functions */
Carlo Caione9c85f252019-08-28 09:46:18 +010019void aml_mhu_secure_message_start(void);
20void aml_mhu_secure_message_send(uint32_t msg);
21uint32_t aml_mhu_secure_message_wait(void);
22void aml_mhu_secure_message_end(void);
23void aml_mhu_secure_init(void);
Carlo Caione49488322019-08-24 17:28:23 +010024
25/* SCPI functions */
Carlo Caione7bb83022019-08-28 10:08:24 +010026void aml_scpi_set_css_power_state(u_register_t mpidr, uint32_t cpu_state,
27 uint32_t cluster_state, uint32_t css_state);
28uint32_t aml_scpi_sys_power_state(uint64_t system_state);
29void aml_scpi_jtag_set_state(uint32_t state, uint8_t select);
30uint32_t aml_scpi_efuse_read(void *dst, uint32_t base, uint32_t size);
31void aml_scpi_unknown_thermal(uint32_t arg0, uint32_t arg1,
32 uint32_t arg2, uint32_t arg3);
33void aml_scpi_upload_scp_fw(uintptr_t addr, size_t size, int send);
Carlo Caione49488322019-08-24 17:28:23 +010034
35/* Peripherals */
Carlo Caione68aa5ee2019-08-25 18:09:59 +010036void aml_thermal_unknown(void);
Carlo Caionebed18972019-08-25 17:26:27 +010037uint64_t aml_efuse_read(void *dst, uint32_t offset, uint32_t size);
38uint64_t aml_efuse_user_max(void);
Carlo Caione49488322019-08-24 17:28:23 +010039
40#endif /* GXBB_PRIVATE_H */