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Jiafei Pan46367ad2018-03-02 07:23:30 +00001/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef LS_16550_H
8#define LS_16550_H
Jiafei Pan46367ad2018-03-02 07:23:30 +00009
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <drivers/console.h>
Jiafei Pan46367ad2018-03-02 07:23:30 +000011
12/* UART16550 Registers */
13#define UARTTX 0x0
14#define UARTRX 0x0
15#define UARTDLL 0x0
16#define UARTIER 0x1
17#define UARTDLLM 0x1
18#define UARTFCR 0x2
19#define UARTLCR 0x3
20#define UARTLSR 0x5
21#define UARTMCR 0x4
22
23/* FIFO Control Register bits */
24#define UARTFCR_FIFOMD_16450 (0 << 6)
25#define UARTFCR_FIFOMD_16550 (1 << 6)
26#define UARTFCR_RXTRIG_1 (0 << 6)
27#define UARTFCR_RXTRIG_4 (1 << 6)
28#define UARTFCR_RXTRIG_8 (2 << 6)
29#define UARTFCR_RXTRIG_16 (3 << 6)
30#define UARTFCR_TXTRIG_1 (0 << 4)
31#define UARTFCR_TXTRIG_4 (1 << 4)
32#define UARTFCR_TXTRIG_8 (2 << 4)
33#define UARTFCR_TXTRIG_16 (3 << 4)
34#define UARTFCR_DMAEN (1 << 3) /* Enable DMA mode */
35#define UARTFCR_TXCLR (1 << 2) /* Clear contents of Tx FIFO */
36#define UARTFCR_RXCLR (1 << 1) /* Clear contents of Rx FIFO */
37#define UARTFCR_FIFOEN (1 << 0) /* Enable the Tx/Rx FIFO */
38#define UARTFCR_64FIFO (1 << 5)
39
40/* Line Control Register bits */
41#define UARTLCR_DLAB (1 << 7) /* Divisor Latch Access */
42#define UARTLCR_SETB (1 << 6) /* Set BREAK Condition */
43#define UARTLCR_SETP (1 << 5) /* Set Parity to LCR[4] */
44#define UARTLCR_EVEN (1 << 4) /* Even Parity Format */
45#define UARTLCR_PAR (1 << 3) /* Parity */
46#define UARTLCR_STOP (1 << 2) /* Stop Bit */
47#define UARTLCR_WORDSZ_5 0 /* Word Length of 5 */
48#define UARTLCR_WORDSZ_6 1 /* Word Length of 6 */
49#define UARTLCR_WORDSZ_7 2 /* Word Length of 7 */
50#define UARTLCR_WORDSZ_8 3 /* Word Length of 8 */
51
52/* Line Status Register bits */
53#define UARTLSR_RXFIFOEMT (1 << 9) /* Rx Fifo Empty */
54#define UARTLSR_TXFIFOFULL (1 << 8) /* Tx Fifo Full */
55#define UARTLSR_RXFIFOERR (1 << 7) /* Rx Fifo Error */
56#define UARTLSR_TEMT (1 << 6) /* Tx Shift Register Empty */
57#define UARTLSR_THRE (1 << 5) /* Tx Holding Register Empty */
58#define UARTLSR_BRK (1 << 4) /* Break Condition Detected */
59#define UARTLSR_FERR (1 << 3) /* Framing Error */
60#define UARTLSR_PERR (1 << 3) /* Parity Error */
61#define UARTLSR_OVRF (1 << 2) /* Rx Overrun Error */
62#define UARTLSR_RDR (1 << 2) /* Rx Data Ready */
63
64#define CONSOLE_T_16550_BASE CONSOLE_T_DRVDATA
65
Julius Werner53456fc2019-07-09 13:49:11 -070066#ifndef __ASSEMBLER__
Jiafei Pan46367ad2018-03-02 07:23:30 +000067
Antonio Nino Diaz4b32e622018-08-16 16:52:57 +010068#include <stdint.h>
Jiafei Pan46367ad2018-03-02 07:23:30 +000069
70typedef struct {
71 console_t console;
72 uintptr_t base;
73} console_ls_16550_t;
74
75/*
76 * Initialize a new 16550 console instance and register it with the console
77 * framework. The |console| pointer must point to storage that will be valid
78 * for the lifetime of the console, such as a global or static local variable.
79 * Its contents will be reinitialized from scratch.
80 */
81int console_ls_16550_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
82 console_ls_16550_t *console);
83
Julius Werner53456fc2019-07-09 13:49:11 -070084#endif /*__ASSEMBLER__*/
Jiafei Pan46367ad2018-03-02 07:23:30 +000085
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000086#endif /* LS_16550_H */